R&D Engineer IC Design 5

Socket.dev; Wayne (CA); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

401K matching

Employee Stock Purchase Program (ESPP)

Employee Assistance Program (EAP)

Paid holidays

Vacation time

Job summary

Socket.dev seeks an experienced ASIC verification engineer to join the system-level verification team in California. You will develop verification environments and test plans for high-performance networking silicon, collaborating with architects and design engineers to drive verification closure.

With 8+ years in ASIC design/verification and strong Verilog/SystemVerilog skills, you will contribute across the lifecycle from testbench architecture to tape-out, including exposure to Ethernet/PCIe

Qualifications

• 8+ years of ASIC design/verification experience.
• Bachelor's in Engineering.
• Strong Verilog knowledge with C/C++ hands-on.
• Experience with UVM/SystemVerilog and ASIC verification flows.
• Networking protocols (Ethernet, PCIe) experience is a plus.
• Multiple ASIC tape-outs completed.

Responsibilities

• Develop complex verification environments and test plans.
• Verify high-performance network switch ASIC/FPGA end-to-end.
• Collaborate with system architects, design and verification teams; implement across verification stack.

Skills

ASIC verification

Verilog

SystemVerilog

UVM

C/C++

OOP

Networking protocols

Education

Bachelor's in Engineering

Job description

Job Description:

This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands-on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles—from architecting testbenches (networking background preferred) to achieving full verification closure.

Education & Experience

• Experience: 8+ years of ASIC design/verification experience, including a complete understanding of Verilog design and hands-on experience with C/C++.
• Education: Bachelor's in Engineering
• Methodologies & Languages: Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog).
• Technical Depth: Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub-micron technologies.
• Domain Knowledge: Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus.
• Track Record: Must have completed multiple ASIC tape-outs, with at least one project taken from initial concept through full production.
• Communication: Fully comfortable with technical and business English across documentation, cross-functional collaboration, and executive communications.

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

• Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.