Production ATE Engineer: Teradyne Automation & Yield

TetraMem Inc.

San Jose (CA)

Hybrid

USD 130,000 - 250,000

Full time

41 hours ago
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Job summary

TetraMem Inc. is seeking an engineer to develop, maintain, and optimize production ATE test programs using Teradyne UltraFLEX and/or J750 for wafer sort and final test.

You will design automation tools in Python, C/C++, or scripting languages to boost test development efficiency and manufacturing productivity. Responsibilities include silicon bring-up, data analysis, and collaborating with Design, DFT, Reliability, and OSAT teams to support NPI and ramp, while driving continuous improvements in

Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a related technical field.
  • Experience developing production ATE test programs using Teradyne UltraFLEX and/or J750 platforms (required).
  • Strong programming skills in Python, C/C++, Perl, or other scripting languages for automation.
  • Experience with semiconductor production testing, silicon characterization, and high-volume manufacturing.

Responsibilities

  • Develop, maintain, and optimize production ATE test programs for wafer sort and final test.
  • Design and implement automation tools to improve test development efficiency and manufacturing productivity.
  • Analyze test data, yield, and failure mechanisms to drive corrective actions and quality improvements.
  • Collaborate across IC Design, DFT, Reliability, and OSAT partners to support NPI and ramp.

Skills

Python
C/C++
Perl
Scripting languages

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics

Tools

Teradyne UltraFLEX
J750
JMP
MATLAB
SQL

Job description

TetraMem Inc. is seeking an engineer to develop, maintain, and optimize production ATE test programs using Teradyne UltraFLEX and/or J750 for wafer sort and final test.

You will design automation tools in Python, C/C++, or scripting languages to boost test development efficiency and manufacturing productivity. Responsibilities include silicon bring-up, data analysis, and collaborating with Design, DFT, Reliability, and OSAT teams to support NPI and ramp, while driving continuous improvements in

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