Principal Silicon Technology Engineer

AMD; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

AMD seeks a Principal Engineer to act as a technical authority across the full lifecycle of FPGA and ASIC solutions. You will drive technology evaluation, design enablement, and process development from early concept through qualification to high-volume manufacturing, working with foundries and packaging vendors.

The ideal candidate will understand advanced silicon tech, device physics, reliability mechanisms, and have strong communication and leadership skills to guide cross-functional teams

Qualifications

• Requires familiarity with advanced silicon technologies including manufacturing process, device physics, and reliability mechanisms.
• Experience with FPGA and ASIC product development and yield ramp-up.
• Strong communication, interpersonal skills, and collaboration with design teams and foundry partners.

Responsibilities

• Evaluate technology, enable design, and develop processes for FPGA/ASIC products in advanced nodes.
• Analyze product WAT, performance correlation, and yield during NPI with foundry and design teams.
• Coordinate testchip design and tapeout for process and IP validation prior to NPI.
• Collaborate with design, CAD, and PDK teams to enable robust IP and product designs.
• Support silicon technology roadmap exploration to meet customer requirements.

Skills

Communication

Interpersonal skills

Analytical skills

Problem solving

Leadership

Management experience

Education

Bachelor's degree in engineering or physical science

Advanced degree (MS or PhD)

Tools

EDA tools

PDK support

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next‑gen processors, enabling AI breakthroughs, or creating go‑to‑market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

The Role

We are seeking an exceptional Principal Engineer to serve as a technical authority and strategic contributor across the full product lifecycle of FPGA and ASIC solutions. This role encompasses advanced silicon technology evaluation, design enablement, process development, and manufacturing bring‑up — spanning from early concept exploration through qualification and transfer to high‑volume production (HVM).

The Person

The ideal candidate must be familiar with advanced silicon technologies including manufacturing process, device physics, reliability mechanisms as well as foundry PDK support. A good understanding of FPGA and ASIC product development and yield ramp‑up is desired. The candidate shall possess effective communication, good interpersonal skills and be able to work seamlessly with design teams, foundry partners and package/assembly vendors.

Key Responsibilities

• Responsible for technology evaluation, design enablement and process development of FPGA and ASIC products in advanced nodes
• Responsible for product WAT analysis, performance correlation and yield analysis during NPI in collaboration with foundry and design teams
• Coordinate testchip design and tapeout for process and IP validation prior to NPI phase
• Co-work with design, CAD & PDK teams to accomplish robust IP & product designs
• Assist Silicon technology roadmap exploration to meet end customer requirements

Preferred Experience

• Familiar with advanced semiconductor technologies including FinFET, GAA, Backside Power etc.
• Past experience of supporting product silicon development and NPI is required
• Strong background in development and tape out of process and IP validation test vehicles
• Working knowledge of IP and SoC analog and digital design flows with foundry PDK support experience
• Experience with major EDA tools for device model, layout, circuit simulation, parasitic extraction, and physical verification
• Familiarity with device reliability degradation mechanisms, test methods, and lifetime modeling
• Working knowledge of 3DIC advanced packaging technologies including CoWoS and SoIC is a plus
• Strong analytical, problem solving, decision‑making and communication skills
• Prior team leadership and management experience is a plus

Academic Credentials

• Bachelor’s degree in engineering or physical science, preferably with advanced degree (MS or PhD)

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.