Principal SI/PI Architect for MEMS Timing Systems

SiTime Corp.; Santa Clara (CA); Sur place; USD 180 000 - 240 000; Plein temps

Avantages offerts par ce poste

Quarterly bonus

Equity grants

401k plan

Résumé du poste

SiTime Corp. in Santa Clara, CA, seeks a Principal Hardware Signal Integrity/Power Integrity Architect to lead system-level electrical design and develop SI/PI methodologies for MEMS timing platforms.

You will collaborate across teams to simulate and optimize hardware, ensuring robust electrical integrity and reliability through testing. The role requires 10+ years in hardware design, mastery of high-speed interfaces, and expertise with PCB reviews using Altium/Allegro.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• Over 10 years of expertise in hardware system design, including comprehensive signal integrity analysis and optimization.
• Proficiency in PCB design tools such as Altium, Allegro, and APD, with a strong capability for conducting thorough PCB reviews.

Responsabilités

• Lead signal integrity (SI) design initiatives for system platforms supporting advanced SiTime timing products across diverse business units and applications.
• Establish comprehensive methodologies for both signal and power integrity across a variety of hardware platforms, including validation environments, probing stations, load boards, and production test systems.
• Identify, assess, and integrate new technologies, components, and techniques to enhance overall signal and power integrity performance.
• Deliver robust and cost-effective signal integrity solutions by conducting detailed analysis, simulations, experimental design, and verification utilizing advanced tools and methodologies.
• Collaborate closely with circuit design, packaging, board design, and product teams to define reliable system components at all levels, including package, sockets, connectors, and board architecture.
• Ensure the delivery of high-quality, first-pass-success hardware infrastructure through expert root cause analysis and resolution, with an emphasis on addressing signal and power integrity challenges.

Connaissances

Signal integrity

PCB design

High-speed interfaces

S-parameters extraction

Leadership

Formation

Master's degree in Electrical Engineering

Outils

Altium

Allegro

APD

Description du poste

SiTime Corp. in Santa Clara, CA, seeks a Principal Hardware Signal Integrity/Power Integrity Architect to lead system-level electrical design and develop SI/PI methodologies for MEMS timing platforms.

You will collaborate across teams to simulate and optimize hardware, ensuring robust electrical integrity and reliability through testing. The role requires 10+ years in hardware design, mastery of high-speed interfaces, and expertise with PCB reviews using Altium/Allegro.