Principal Physical Design Engineer - Chiplet Systems

Eliyan Corporation; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Eliyan Corporation in San Francisco is seeking a Principal Physical Design Engineer to lead the full ASIC flow from RTL to GDSII and optimize methodologies for high-quality, manufacturable products. You will own block-level architecture, power planning, and clocking strategies, guiding a growing team of designers.

The role demands 8–12 years of ASIC experience in a chiplet startup environment, with a hands-on mindset and a track record of delivering silicon on aggressive schedules.

Qualifications

• 8–12 years of ASIC physical design experience.
• Experience guiding RTL to GDSII flows.
• Strong focus on architecture, power planning, and clocking.

Responsibilities

• Lead the full chip design flow from RTL to GDSII.
• Own architecture decisions, power planning, and timing strategies.
• Collaborate with cross-functional teams to deliver manufacturable silicon.

Skills

ASIC design

Physical design

Power integrity

Clocking strategies

Education

Master's preferred in EE or related field

Job description

Eliyan Corporation, a leading chiplet startup in San Francisco, is seeking a Principal Physical Design Engineer to drive the development of cutting-edge ASICs. This role involves overseeing the entire design flow from RTL to GDSII and optimizing methodologies for high-quality, manufacturable products.

The ideal candidate will bring 8 to 12 years of experience in ASIC physical design, with a strong focus on architecture, power planning, and clocking strategies. Join a dynamic team at the forefront of technology!