Senior IP Physical Design Lead for Chiplet ASICs

Eliyan Corporation; San Francisco (CA); On-site; USD 210,000 - 320,000; Full time

Benefits offered by this job

Excellent benefits

Job summary

Eliyan Corporation is seeking a Sr Staff / Principal Physical Design Engineer in San Francisco to lead end-to-end ASIC physical design at an early-stage startup. You will drive IP blocks from RTL to GDSII, manage timing, power, and signoff, and optimize flows with a cross-functional team to meet ambitious tapeout goals.

Join a fast-paced environment that values innovation, high-quality design, and on-time delivery.

Qualifications

• Expertise in physical design, timing closure, and signoff for ASIC blocks including mixed signal integration.
• Strong floorplanning, power planning, placement, CTS, routing, EM/IR, STA, and PV signoff across MMMC scenarios.
• Proven ability to improve design flows through automation and scripting with data-driven QoR.
• Excellent cross-functional leadership and communication to drive alignment under tight timelines.

Responsibilities

• Define and execute IP block and partition physical design strategy across projects.
• Lead mixed signal placement and routing with analog keepouts and DRC-aware methods.
• Own system and block integration for floorplanning, power, placement, CTS, and constraints.
• Drive end-to-end IP physical implementation from RTL to GDSII with ECOs and closures.
• Develop block flow customizations for synthesis, PNR, EM/IR, STA, PV.
• Deliver robust constraints methodology ensuring timing and corner correctness.
• Run subsystem signoff including STA, EM/IR, SI, DRC, LVS, antenna, and metal fill.
• Optimize clock architecture and CTS for skew, latency, and power.
• Collaborate with front end, packaging, and manufacturing to resolve risks.
• Provide status and mitigation reporting with metrics for PPA, convergence, and schedule.

Skills

Physical design

Timing closure

Signoff

Floorplanning

Power planning

Placement

CTS

Routing

EM/IR

STA

PV signoff

Automation & scripting

Cross-functional leadership

Tools

MMMCS tools

Job description

Eliyan Corporation is seeking a Sr Staff / Principal Physical Design Engineer in San Francisco to lead end-to-end ASIC physical design at an early-stage startup. You will drive IP blocks from RTL to GDSII, manage timing, power, and signoff, and optimize flows with a cross-functional team to meet ambitious tapeout goals.

Join a fast-paced environment that values innovation, high-quality design, and on-time delivery.