Principal Mixed-Signal IC Design Engineer: High-Speed ADC/DAC

Blue Origin LLC; San Diego (CA); On-site; USD 269,000 - 377,000; Full time

Benefits offered by this job

Relocation provided

Travel up to 10%

Medical, dental, vision

401(k) with company match up to 5%

Education Support Program

Job summary

Blue Origin seeks a Principal IC Design Engineer to lead the architecture and development of high-speed ADCs and DACs in advanced FinFET CMOS, delivering state‑of‑the‑art mixed‑signal front‑end circuits for RF payloads.

You will mentor engineers, drive tape-out readiness, collaborate with system architects, and optimize performance, power, and yield. Onsite work in San Diego or Cupertino with relocation support and up to 10% travel.

Qualifications

• 10+ years of industry experience in high-speed mixed-signal IC design.
• Proficiency with FinFET technologies and ADC/DAC design.
• Experience with SAR, pipeline, delta-sigma architectures and RF interfaces.
• Strong modeling and verification using MATLAB, Simulink, SystemVerilog-AMS.

Responsibilities

• Lead architecture, development and integration of high-speed data converters.
• Develop behavioral models to validate system performance before tape-out.
• Collaborate with system architects to meet RF payload requirements.
• Oversee layout, floorplanning, verification and production readiness.
• Mentor junior engineers on analog/mixed-signal design best practices.

Skills

High-speed ADCs

High-speed DACs

FinFET CMOS

SerDes

MATLAB/Simulink

SystemVerilog-AMS

AMS flows

Layout and tape-out

Electronic debugging

Education

Bachelor's degree in Electrical Engineering

MS or PhD in Electrical Engineering (preferred)

Tools

MATLAB

Simulink

SystemVerilog-AMS

Spectre/AMS

Job description

Blue Origin seeks a Principal IC Design Engineer to lead the architecture and development of high-speed ADCs and DACs in advanced FinFET CMOS, delivering state‑of‑the‑art mixed‑signal front‑end circuits for RF payloads.

You will mentor engineers, drive tape-out readiness, collaborate with system architects, and optimize performance, power, and yield. Onsite work in San Diego or Cupertino with relocation support and up to 10% travel.