Principal FPGA Emulation Engineer: Real-Time Prototyping

Renesas Electronics Corp.; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Renesas Electronics Corp. is seeking a Principal FPGA Emulation & Prototyping Engineer to build FPGA-based platforms that emulate mixed-signal power ASICs pre-silicon. You will validate real-time digital and power-control architectures while ensuring functional equivalence to the RTL design.

You will lead emulation efforts, mentor engineers, and drive FPGA/tooling decisions across silicon and systems teams to deliver robust pre-silicon validation environments.

Qualifications

• Extensive FPGA design and implementation experience.
• Expert-level SystemVerilog and/or VHDL RTL design.
• Deep understanding of FPGA architecture and resources.
• Hands-on in adapting ASIC RTL for FPGA emulation.
• Strong scripting for automation (TCL, Python).

Responsibilities

• Collaborate with RTL and DSP teams to enable real-time FPGA emulation of ASIC designs.
• Adapt RTL for FPGA emulation while preserving functional equivalence.
• Map designs to FPGA fabric to meet emulation speed targets.
• Create real-time environment around digital core and power stages.
• Develop pre-silicon debug visibility and assertions.
• Improve emulation methodology, flows, and automation.
• Provide technical leadership and cross-team reviews.

Skills

FPGA design

SystemVerilog/VHDL

RTL optimization

Emulation/prototyping

Scripting (TCL/Python)

Debugging

Leadership

Clocking & CDC

Automation workflows

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Vivado

Quartus

Xilinx/Intel FPGA tooling

Job description

Renesas Electronics Corp. is seeking a Principal FPGA Emulation & Prototyping Engineer to build FPGA-based platforms that emulate mixed-signal power ASICs pre-silicon. You will validate real-time digital and power-control architectures while ensuring functional equivalence to the RTL design.

You will lead emulation efforts, mentor engineers, and drive FPGA/tooling decisions across silicon and systems teams to deliver robust pre-silicon validation environments.