Principal FPGA Emulation Engineer

Anysilicon; Austin (TX); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Renesas seeks a Principal FPGA Emulation & Prototyping Engineer to develop FPGA-based platforms for emulating mixed-signal power ASICs before silicon production. Collaborate with RTL and DSP architects to validate designs in real-time, ensuring functional equivalence and early RTL issue reduction.

You will adapt ASIC RTL for FPGA emulation, optimize for speed, build real-time environments with HIL setups, and lead cross-team reviews while mentoring engineers.

Qualifications

• 10+ years in FPGA design and emulation for ASIC/SoC
• RTL design with SystemVerilog/VHDL
• Experience achieving real-time performance on FPGAs
• Adapting ASIC RTL for FPGA emulation, including clocking
• Expertise with FPGA implementation flows: synthesis and timing
• Scripting for automation in TCL or Python
• Hardware bring-up and debugging experience
• Technical leadership: mentoring and cross-team reviews
• BS or MS in Electrical/Computer Engineering

Responsibilities

• Collaborate with RTL and DSP architects to implement ASIC designs on FPGA for real-time emulation.
• Adapt ASIC RTL for FPGA emulation while preserving functional equivalence.
• Optimize FPGA resource usage to meet emulation speed requirements.
• Build real-time environments around digital cores and interface with analog/power stages.
• Develop pre-silicon debug capabilities including logic analysis and waveform capture.
• Improve emulation methodologies and automation in TCL/Python.
• Provide technical leadership through mentoring and cross-team reviews.

Skills

Real-time HIL emulation

Mixed-signal modeling

FPGA prototyping

SystemVerilog/VHDL RTL

Clocking control

Synthesis & timing

Scripting TCL/Python

Hardware bring-up

Technical leadership

Embedded firmware co-development

Education

BS/MS in Electrical/Computer Engineering

Tools

Synopsys HAPS

Cadence Protium

Simulink

Xilinx System Generator

Job description

Renesas is looking for a Principal FPGA Emulation & Prototyping Engineer to develop FPGA-based platforms for emulating mixed-signal power ASICs prior to silicon production. This role involves close collaboration with silicon RTL and DSP architects to validate designs, ensuring functional equivalence and real-time performance while addressing potential RTL issues early in the design process.

Responsibilities:

• Collaborate with silicon RTL and DSP architects to implement ASIC designs on FPGA, ensuring architectural intent is realized in a real-time emulation platform.
• Adapt ASIC RTL for FPGA emulation while maintaining functional equivalence, including handling clock-gating, memory mapping, and analog block modeling.
• Optimize designs for FPGA resources to achieve required emulation speeds, managing DSP slices, memory, and clocking.
• Build real-time environments around digital cores, interfacing with analog and power stages, and integrating hardware-in-the-loop setups as necessary.
• Develop pre-silicon debug capabilities, including logic analysis and waveform capture, to support firmware and software co-development.
• Continuously improve emulation methodologies, guidelines, and automation processes using TCL/Python.
• Provide technical leadership through mentoring, leading reviews, and influencing emulation and tooling decisions across teams.

Qualifications:

• 10+ years of extensive FPGA design and implementation experience, particularly in ASIC/SoC prototyping or emulation.
• Expertise in RTL design using SystemVerilog and/or VHDL, with a strong background in ASIC-style RTL.
• In-depth knowledge of FPGA architecture, including DSP slices and memory management, with proven ability to achieve real-time performance.
• Hands-on experience in adapting ASIC RTL for FPGA, including clock-gating and multi-clock handling.
• Strong command of FPGA implementation flows, including synthesis and timing analysis, particularly on Xilinx or Intel devices.
• Experience with hardware bring-up and debugging, including in-system logic analysis and lab instrumentation.
• Proficiency in scripting for automation using TCL or Python.
• Demonstrated technical leadership skills, including mentoring and driving cross-team decisions.
• BS or MS in Electrical Engineering, Computer Engineering, or a related field.

Skills:

• Real-time hardware-in-the-loop emulation and modeling of mixed-signal systems.
• Understanding of digital power-conversion control and mixed-signal systems.
• FPGA DSP implementation and real-time emulation of DSP datapaths.
• Experience with commercial FPGA prototyping platforms like Synopsys HAPS or Cadence Protium.
• Model-based design experience with Simulink or Xilinx System Generator.
• Familiarity with high-speed interfaces such as JESD204B and PCIe.
• Exposure to ASIC design and tape-out processes, including DFT considerations.
• Ability to architect custom FPGA prototyping platforms, including PCB design and signal integrity.
• Experience in embedded/microcontroller and firmware co-development.