Principal FPGA/ASIC Design Engineer - Hybrid

Rolls-Royce plc; Indianapolis (IN); Hybrid; USD 123,000 - 247,000; Full time

Benefits offered by this job

Hybrid work schedule

Relocation assistance

Discretionary bonus

Job summary

Rolls-Royce plc in Indianapolis, IN or Reston, VA, is hiring a Principal Engineer for FPGA/ASIC design with a hybrid work pattern. The role covers all project phases, from design through verification to ensure robust, DO-254 compliant hardware.

The candidate will develop RTL in Verilog/VHDL/SystemVerilog, verify with simulations, and optimise timing. A relevant degree with 5+ years in electronics/embedded design is required, plus US citizenship, with relocation support and strong benefits.

Qualifications

• Bachelor's degree in Electronics Engineering and/or Computer Engineering.
• 5+ years of experience in electronics/embedded design.
• Master's degree in Electronics Engineering and/or Computer Engineering with 3+ years of experience.
• PhD in Electronics Engineering and/or Computer Engineering.
• U.S. Citizenship is required to be considered for this role.

Responsibilities

• Participate in all project phases and produce detailed design documentation and verification plans.
• Design and develop custom digital devices (ASIC/FPGA) to support RR electronic engine control units.
• Verify complex FPGA/ASIC products to DO-254.
• Develop RTL using VHDL/Verilog/SystemVerilog and debug with simulation.
• Achieve timing closure on FPGA designs and generate test benches.
• Evaluate process flow from design to place-and-route, timing constraints, and power usage.

Skills

HDL design experience

DO-254 familiarity

HDL verification and test benches

Education

Bachelor's degree in Electronics/Computer Engineering

Master's degree in Electronics/Computer Engineering

PhD in Electronics/Computer Engineering

Tools

Verilog

VHDL

SystemVerilog

Job description

Rolls-Royce plc in Indianapolis, IN or Reston, VA, is hiring a Principal Engineer for FPGA/ASIC design with a hybrid work pattern. The role covers all project phases, from design through verification to ensure robust, DO-254 compliant hardware.

The candidate will develop RTL in Verilog/VHDL/SystemVerilog, verify with simulations, and optimise timing. A relevant degree with 5+ years in electronics/embedded design is required, plus US citizenship, with relocation support and strong benefits.