Principal Engineer, DDR Verification & Silicon DDR bring up (AI2560)

SiMa.ai, Inc.; San Jose (CA); Vor Ort; USD 204.000 - 316.000; Vollzeit

Benefits dieser Stelle

Equity

Benefits package

Zusammenfassung

SiMa.ai, Inc. in San Jose, CA is seeking a Principal Engineer to lead DDR verification and silicon bring-up efforts.

The role focuses on functional verification of DDR controllers and DDR-phy across block, sub-system, and SoC levels, plus bring-up on silicon and emulation debugging. You will define test benches with UVM/SystemVerilog, develop initialization sequences for silicon bring-up, and collaborate with MLSoC Architecture and Hardware/Software teams to advance DDR performance and

Qualifikationen

• 15+ years of experience in functional verification and silicon bring-up
• Very good experience with UVM and SystemVerilog based verification
• Working experience on DDR or LPDDR4/5 protocols
• DDR bring-up and debug on Silicon
• Experience and skill set for silicon bringup/debug in the lab
• Good debug and problem solving skills

Aufgaben

• Participate in DDR architecture, micro-architecture and feature discussions and reviews
• Define and develop DDR test bench components using UVM & System Verilog
• Bring up and testing of DDR at MLSoC level in full-chip test environment
• Develop and execute a test plan
• Verification execution of DDR functionality and performance measurements
• Manage debug of test and regression failures
• Work closely with the Architecture, MLSoC Hardware and Software teams
• Generate required DDR initialization sequence for Silicon bring up and debug in the lab
• Participating with MLSoC SW team for DDR silicon bring up and debug

Kenntnisse

UVM

SystemVerilog

DDR protocols

Debugging

Silicon bring-up

Ausbildung

BS/MS in EE or CS

Tools

Emulation

Jobbeschreibung

Job Title: Principal Engineer, DDR Verification & Silicon DDR bring up

Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office)

Job ID: AI2560

Description:

The DDR Design Verification (DV) engineer at SiMa is involved in the functional verification of DDR controllers and DDR-phy at block, sub-system and SoC level. Will also be involved in bring-up and debug on emulator. Generate required DDR controller and phy initialization (register programming code sequence) for DDR bring up on silicon.

Key Responsibilities:

• Participate in DDR architecture, micro-architecture and feature discussions and reviews
• Define and develop DDR test bench components using UVM & System Verilog
• Bring up and testing of DDR at MLSoC level in full-chip test environment
• Develop and execute a test plan
• Verification execution of DDR functionality and performance measurements
• Manage debug of test and regression failures
• Work closely with the Architecture, MLSoC Hardware and Software teams
• Generate required DDR initialization sequence for Silicon bring up and debug in the lab
• Participating with MLSoC SW team for DDR silicon bring up and debug

Required Background:

• BS/MS in EE (Electrical Engineering) or CS (Computer Science) with 15+ years of experience in functional verification and silicon bring-up.
• Very good experience of UVM and System Verilog based verification methodology is a must
• Working experience on DDR or LPDDR4/5 protocols
• Working experience on DDR bring-up and debug on Silicon
• Experience and relevant skill set for silicon bringup/debug in the lab
• Good debug and problem solving skills

Personal attributes:

Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.

The annual salary for this position ranges from $203,800 - $315,900. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.

In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.

EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.