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Cadence in California is seeking an experienced hardware/SoC design leader to guide a team developing next‑generation subsystems. You will oversee RTL synthesis, floor planning, clock-tree optimization, and physical verification across Front End RTL and Back End teams.
The role requires strong expertise with Cadence tools (Innovus, Tempus, QRC, Voltus, Pegasus) and deep knowledge of 5nm/3nm/2nm processes, Linux scripting, and standard interfaces (PCIe, DDR, LPDDR, SRAM, UCIe).
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
The annual salary range for California is $140,000 to $260,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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