CPU Architecture & Performance Engineer — Data Center AI

Samsung Semiconductor; San Jose (CA); On-site; USD 163,000 - 253,000; Full time

Job summary

Samsung Semiconductor in San Jose, CA, is seeking a Staff CPU Architecture & Performance Engineer to shape next-generation CPU architectures for data center and agentic AI workloads. You will translate architectural concepts into implementable designs, collaborate with RTL teams, and validate ideas from modeling to silicon.

You will lead microarchitectural innovation across front-end to back-end, build performance models, run CPI/IPC analyses, and contribute to patents and publications while

Qualifications

• Master’s degree in Computer Engineering, Computer Science, or related field with 8+ years of relevant experience, or PhD with 5+ years.
• 4+ years of experience in CPU microarchitecture or performance engineering.
• Hands-on experience designing RISC-V, ARM, or x86 CPU cores, or GPU/NPU vector units.
• Strong understanding of out-of-order execution, branch prediction, pipelines, and memory systems.
• Proficiency in C/C++ and Python; experience with architectural simulators such as gem5.

Responsibilities

• Propose new architecture ideas and own microarchitectural domains.
• Use AI-driven design methodologies to rapidly implement ideas and validate on silicon.
• Build, extend, and validate performance models and simulators.
• Perform CPI/IPC analysis and identify root causes of bottlenecks.
• Evaluate features using trace-driven and cycle-accurate models.
• Characterize workloads including SPEC, server, client, AI/ML, agentic AI.
• Translate analysis into architectural direction and design decisions.
• Drive research leading to patents and publications.

Skills

CPU microarchitecture

Architectural simulators (gem5)

C/C++ and Python

Performance analysis

RISC-V/ARM/x86 cores design

AI-driven design workflows

Education

Master’s degree in Computer Engineering/Computer Science

PhD with 5+ years experience

Tools

gem5

Job description

Samsung Semiconductor in San Jose, CA, is seeking a Staff CPU Architecture & Performance Engineer to shape next-generation CPU architectures for data center and agentic AI workloads. You will translate architectural concepts into implementable designs, collaborate with RTL teams, and validate ideas from modeling to silicon.

You will lead microarchitectural innovation across front-end to back-end, build performance models, run CPI/IPC analyses, and contribute to patents and publications while