Staff CPU Architect & Performance Researcher - Data Center AI

Samsung Semiconductor Inc.; San Jose (CA); On-site; USD 163,000 - 253,000; Full time

Benefits offered by this job

Paid time off

Holidays & sick leave

Fertility care stipend

Medical travel support

Onsite cafe & gym

Flexible work environment

Job summary

Samsung Semiconductor, Inc. is seeking a Staff CPU Architecture & Performance Engineer in the San Jose area. You will shape CPU architectures for data-center workloads and agentic AI, collaborating with RTL teams to translate ideas into silicon validation.

The role emphasizes performance modeling, architecture exploration, and cross-team impact. Qualifications include 8+ years in CPU architecture or a PhD with 5+ years, expertise in RISC-V/ARM/x86 cores, and proficiency in C/C++ and Python.

Qualifications

• 8+ years in CPU architecture or related field
• Experience designing CPU cores (RISC-V/ARM/x86) or GPU/NPUs
• Strong understanding of out-of-order execution, pipelines, caches
• Hands-on with architectural simulators like gem5

Responsibilities

• Propose and own one or more microarchitectural domains (front-end, mid-end, back-end)
• Use AI-driven design methods to implement ideas and validate on silicon
• Develop, extend, and validate performance models and simulators
• Perform CPI/IPC analysis to identify bottlenecks
• Evaluate microarchitectural features using trace-driven and cycle-accurate models
• Translate results into architectural direction and design decisions
• Drive research toward patents and publications

Skills

CPU microarchitecture

RISC-V

C/C++

Python

gem5

Performance modeling

Education

Master's degree in CS/CE

PhD (with 5+ years)

Tools

gem5

Python

Job description

Samsung Semiconductor, Inc. is seeking a Staff CPU Architecture & Performance Engineer in the San Jose area. You will shape CPU architectures for data-center workloads and agentic AI, collaborating with RTL teams to translate ideas into silicon validation.

The role emphasizes performance modeling, architecture exploration, and cross-team impact. Qualifications include 8+ years in CPU architecture or a PhD with 5+ years, expertise in RISC-V/ARM/x86 cores, and proficiency in C/C++ and Python.