Principal 2D MoS2 Device & Compact Modeling Engineer

PhantaField

Santa Clara (CA)

On-site

USD 170,000 - 260,000

Full time

6 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

PhantaField is seeking a Principal Device and Compact Modeling Engineer to define and measure the first all‑MoS₂ memory cell (2T0C) at multiple temperatures, then develop compact models for the tier PDK and Sophon models. You will lead device characterization and model extraction, with data ownership secured before external-lab measurements.

The role reports to the CEO and leads the device, characterization and PDK team.

Qualifications

  • PhD plus 8+ years in FET device physics.
  • Measured pA-level leakage and retention.
  • Extract compact models in Verilog-A or BSIM style with corners and temperature.
  • Use TCAD to explain measurements.
  • Report distributions and their tails.

Responsibilities

  • HOT CELL: Specify and measure first all-MoS₂ 2T0C cell at 25, 85, 95 and 105 °C on a rail of 1 V or less.
  • LEAKAGE: Measure tier-select off-current at 105 °C with budget ~210 pA per gate and the follow-on read margin.
  • COMPACT MODELS: Extract models with corners and temperature; calibrate with device data for PDK and Sophon models.
  • CELL LAYOUT: Check 8F² cell layout against measured retention.
  • DATA OWNERSHIP: Get data ownership written before any external-lab measurements.

Skills

FET device physics
Compact modeling
TCAD usage
Statistical analysis
External labs coordination

Education

PhD in related field

Tools

Verilog-A
BSIM

Job description

PhantaField is seeking a Principal Device and Compact Modeling Engineer to define and measure the first all‑MoS₂ memory cell (2T0C) at multiple temperatures, then develop compact models for the tier PDK and Sophon models. You will lead device characterization and model extraction, with data ownership secured before external-lab measurements.

The role reports to the CEO and leads the device, characterization and PDK team.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Principal Device and Compact Modeling Engineer (2D TMD Tiers)
Principal Device and Compact Modeling Engineer (2D TMD Tiers)

PhantaField • Santa Clara (CA)

On-site
USD 170,000 - 260,000
Senior PDK & Tier Layout Engineer for 2D MoS2 Chips
Senior PDK & Tier Layout Engineer for 2D MoS2 Chips

PhantaField • Santa Clara (CA)

On-site
USD 170,000 - 230,000
Lead 2D MoS2 Growth Process Engineer
Lead 2D MoS2 Growth Process Engineer

PhantaField • Santa Clara (CA)

On-site
USD 180,000 - 290,000
Senior Characterization and Test Engineer
Senior Characterization and Test Engineer

PhantaField • Santa Clara (CA)

On-site
USD 150,000 - 230,000
Lead Tier Process Integration Engineer (2D/Monolithic)
Lead Tier Process Integration Engineer (2D/Monolithic)

PhantaField • Santa Clara (CA)

On-site
USD 240,000 - 400,000
Principal DRAM Circuit Designer, Side S64 Chip Lead
Principal DRAM Circuit Designer, Side S64 Chip Lead

PhantaField • Santa Clara (CA)

On-site
USD 210,000 - 290,000
Principal Process Engineer, 2D Growth
Principal Process Engineer, 2D Growth

PhantaField • Santa Clara (CA)

On-site
USD 180,000 - 290,000
Senior Memory Characterization & Test Engineer
Senior Memory Characterization & Test Engineer

PhantaField • Santa Clara (CA)

On-site
USD 150,000 - 230,000
Lead DRAM Circuit Designer for Van der Waals Memory Die
Lead DRAM Circuit Designer for Van der Waals Memory Die

PhantaField • Santa Clara (CA)

On-site
USD 210,000 - 290,000
Principal Tier Process Integration Engineer
Principal Tier Process Integration Engineer

PhantaField • Santa Clara (CA)

On-site
USD 240,000 - 400,000