Pre-Silicon Memory Verification Engineer (Hybrid)

Solidigm Inc.; California (MO); Hybrid; USD 121,000 - 194,000; Full time

Benefits offered by this job

RSU

RCU

Cash bonus

Job summary

Solidigm is hiring for a pre-silicon verification role focused on advanced 3D NAND designs. You will develop UVM-based tests, write SVAs, and create coverage models to ensure robustness of memory products. The role involves mixed-signal modeling and automation to streamline verification workflows.

The position is hybrid, based in Rancho Cordova, CA, with three days on-site. Strong debugging, scripting, and cross-functional collaboration are essential, as is experience in memory verification and

Qualifications

• Master’s degree with 3+ years of relevant experience or bachelor’s with 5+ years in Electrical/Computer Engineering or related field.
• Experience in pre-silicon verification of memory products is required.
• Hands-on experience with UVM, SystemVerilog Assertions, and formal property verification.
• Hands-on experience with mixed-signal verification, modeling, and simulation.
• Strong data analysis capabilities and ability to communicate findings clearly.

Responsibilities

• Create and maintain verification test plans based on design specifications.
• Develop UVM-based directed and constrained-random tests, debug simulation failures, and identify issues.
• Define functional coverage models and perform coverage analysis and closure.
• Create and maintain SystemVerilog Assertions (SVA) for 3D NAND designs.
• Develop, maintain, and enhance the UVM-based verification environment.
• Develop and maintain mixed-signal full-chip models and verification environments.
• Develop scripts and tools to automate verification workflows, regression execution, results processing, and data collection.

Skills

UVM-based verification

SystemVerilog Assertions

Formal verification

Mixed-signal verification

Python

Perl

Shell scripting

Debugging

Data analysis

Cross-functional collaboration

Education

Master’s degree in Electrical Engineering or related field

Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science

Tools

UVM

SystemVerilog

Formal verification tools

Mixed-signal simulators

Job description

Solidigm is hiring for a pre-silicon verification role focused on advanced 3D NAND designs. You will develop UVM-based tests, write SVAs, and create coverage models to ensure robustness of memory products. The role involves mixed-signal modeling and automation to streamline verification workflows.

The position is hybrid, based in Rancho Cordova, CA, with three days on-site. Strong debugging, scripting, and cross-functional collaboration are essential, as is experience in memory verification and