Pre-Silicon IP Verification Engineer

Intel Corporation; Hillsboro (OR); Hybrid; USD 106,000 - 200,000; Full time

Benefits offered by this job

Health insurance

Stock bonuses

Retirement plan

Vacation

Job summary

Intel Corporation in Hillsboro, Oregon seeks an experienced verification engineer to help shape next-generation silicon. You will develop RTL models and pre-silicon tests for test chips on cutting-edge processes, collaborating with architecture, physical design, and post-silicon teams to ensure robust silicon.

The role emphasizes UVM-based testbenches, verification strategy ownership, power verification methodologies, SystemVerilog Assertions, and end-to-end validation across multiple projects.

Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or STEM field plus 1+ years relevant experience.
• Bachelor's degree in Electrical Engineering, Computer Engineering, or STEM field plus 3+ years relevant experience.
• Experience with pre-silicon logic validation using SystemVerilog and UVM.
• Experience in Digital design using Verilog and/or SystemVerilog.
• Experience with pre-silicon validation closure across multiple projects.
• Hands-on experience with UVM testbench design emphasizing reusability and scalability.
• Experience with end-to-end validation strategies for complex digital systems.
• Experience with SystemVerilog Assertions (SVA) for coverage closure.
• Experience with coverage-driven verification methodologies.
• Scripting proficiency in Python, Perl, or TCL for design and verification automation.

Responsibilities

• Design & Develop Verification Environments – Build and maintain scalable UVM-based testbenches and test cases for mixed-signal CMOS designs.
• Define Verification Strategy – Own and drive verification plans ensuring thorough coverage across projects.
• RTL Development & Integration – Develop RTL designs and integrate into SoC architectures with IP providers.
• Power Methodology – Develop power verification methodologies for mixed-signal IPs.
• Assertion-Based Verification – Create and apply SystemVerilog Assertions (SVA) to strengthen coverage.
• Debug & Root Cause Analysis – Identify, debug, and resolve pre-silicon failures and drive issues to closure.
• Cross-Team Collaboration – Partner with architecture, physical design, and post-silicon teams.
• Continuous Improvement – Incorporate learnings into enhanced pre-silicon verification methods.
• Documentation & Reviews – Maintain test plans and lead technical reviews.

Skills

Pre-silicon verification

SystemVerilog/UVM

Verilog/SystemVerilog

UVM testbench design

SVA — SystemVerilog Assertions

Python/Perl/TCL scripting

Debugging and root cause analysis

Cross-team collaboration

Power verification methodologies

Education

Master's degree in Electrical Engineering or Computer Engineering

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

SystemVerilog

Verilog

UPF

SVA

Job description

Intel Corporation in Hillsboro, Oregon seeks an experienced verification engineer to help shape next-generation silicon. You will develop RTL models and pre-silicon tests for test chips on cutting-edge processes, collaborating with architecture, physical design, and post-silicon teams to ensure robust silicon.

The role emphasizes UVM-based testbenches, verification strategy ownership, power verification methodologies, SystemVerilog Assertions, and end-to-end validation across multiple projects.