Senior Power Analytics Engineer - High-Performance CPU/ASIC

SiFive

Santa Clara (CA)

On-site

USD 206,000 - 251,000

Full time

10 days ago
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Benefits offered by this job

Healthcare
Retirement plans
Paid time off
Equity compensation

Job summary

SiFive in Santa Clara, CA is seeking a senior power analytics engineer to develop and deploy methodologies to measure and analyze IP power consumption. You will build power analysis flows and models, correlating with RTL and silicon to guide architecture exploration.

The role requires an MS/PhD in CS or computer architecture, 8+ years in power benchmarking, and hands-on HW or SW development. Join a diverse team with market-based pay and comprehensive benefits.

Qualifications

  • MS or PhD in Computer Science or Computer Architecture is required.
  • 8+ years in power benchmarking, analysis and modeling.
  • Experience with power impacts at architecture, logic design and circuit levels.
  • Knowledge of high-performance out-of-order CPU architectures.
  • Experience with ASIC power analysis and optimization.
  • HW (RTL/implementation flows, verification/validation) or SW development is a strong plus.
  • Strong software engineering practices to maintain large OO code bases.
  • Self-starter with fast learning and strong problem-solving skills.

Responsibilities

  • Develop and deploy power analysis flows and models to collect/analyze power consumption.
  • Correlate power models with RTL and silicon.
  • Develop and deploy power measurement infrastructure.
  • Develop power models for architecture exploration and development.

Skills

Power benchmarking
RTL/FPGA knowledge
ASIC power analysis
CPU architecture
Software engineering practices
Self-starter
Problem solving
Team collaboration

Education

MS/PhD in CS or Computer Architecture

Job description

SiFive in Santa Clara, CA is seeking a senior power analytics engineer to develop and deploy methodologies to measure and analyze IP power consumption. You will build power analysis flows and models, correlating with RTL and silicon to guide architecture exploration.

The role requires an MS/PhD in CS or computer architecture, 8+ years in power benchmarking, and hands-on HW or SW development. Join a diverse team with market-based pay and comprehensive benefits.

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