Post-Silicon ATE & Yield Optimization Engineer

IC Resources; California (MO); On-site; USD 140,000 - 180,000; Full time

Benefits offered by this job

Medical insurance

Vision insurance

401(k)

Job summary

A leading semiconductor technology company is seeking a skilled professional to support customers in post-silicon bring-up and ATE integration. This role involves using advanced analytics to improve chip yield and reliability, collaborating closely with R&D and product teams. Ideal candidates will have hands-on ATE experience and a strong background in test engineering. The position offers a competitive salary range of $140,000 to $180,000 annually and includes benefits such as medical insurance and a 401(k).

Qualifications

• Strong background in IC/product/test engineering with hands-on ATE experience.
• Knowledge of DFT, test pattern conversion, and yield/debug methodologies.
• Skilled in data analytics (JMP, SQL, or similar).
• Comfortable working directly with customers in technical problem-solving.

Responsibilities

• Support customers through post-silicon bring-up and ATE integration.
• Use advanced analytics to turn chip data into insights.
• Collaborate with R&D and product teams to shape future features.

Skills

IC/product/test engineering

ATE experience

DFT knowledge

Test pattern conversion

Yield/debug methodologies

Data analytics (JMP, SQL)

Job description

A leading semiconductor technology company is seeking a skilled professional to support customers in post-silicon bring-up and ATE integration. This role involves using advanced analytics to improve chip yield and reliability, collaborating closely with R&D and product teams. Ideal candidates will have hands-on ATE experience and a strong background in test engineering. The position offers a competitive salary range of $140,000 to $180,000 annually and includes benefits such as medical insurance and a 401(k).