PMIC Design Lead: Analog/Mixed-Signal Architect

Celera Semiconductor; San Francisco (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Celera Semiconductor seeks a Design Lead to spearhead PMIC product design, defining architectures and leading a multidisciplinary team through mixed-signal implementation and tape-outs. You will guide analog/mixed-signal blocks, from LDOs to battery management, ensuring high performance and robust verification.

You will drive cross-functional collaboration with Digital, Verification, Layout, and Test Engineering to optimize power, area, and performance while overseeing post-silicon validation

Qualifications

• Bachelor’s, Master’s, or PhD in Electrical Engineering with a focus on power electronics or microelectronics.
• 10+ years of relevant IC design experience, with a proven track record of releasing multiple PMIC products into high-volume manufacturing.
• Expertise in analog/mixed-signal blocks: Bandgaps, OP-Amps, high-efficiency switching regulators, and data converters (ADC/DAC).
• Proficiency with industry-standard EDA tools (Cadence Virtuoso,Spectre) and modeling languages (Verilog-AMS, SystemVerilog).
• Good understanding of BCD process technologies
• Strong grasp of semiconductor device physics and design for EMI/EMC and ESD protection.

Responsibilities

• Technical Leadership: Direct and participate in the full IC development lifecycle, including research, design, and evaluation of PMIC products.
• Architecture & Specification: Define system-level architectures and write detailed specifications for analog and mixed-signal blocks such as LDOs, Buck/Boost converters, and Battery Management systems.
• Design & Verification: Lead full-chip integration and top-level simulations; drive verification strategies to ensure design completeness across all process corners.
• Cross-Functional Collaboration: Partner with Digital Design, Verification, Layout, and Test Engineering teams to resolve complex trade-offs between power, area, and performance.
• Silicon Debug & Characterization: Lead post-silicon validation, bench correlation, and root-cause analysis during debug phases to ensure production readiness.

Skills

PMIC design

Analog/mixed-signal

Power electronics

OP-amps

LDOs

Buck/Boost

Battery management

Verilog-AMS

SystemVerilog

Cadence Virtuoso

Spectre

Education

Electrical Engineering (BSc/MSc/PhD)

Tools

Cadence Virtuoso

Cadence Spectre

Verilog-AMS

SystemVerilog

Job description

Celera Semiconductor seeks a Design Lead to spearhead PMIC product design, defining architectures and leading a multidisciplinary team through mixed-signal implementation and tape-outs. You will guide analog/mixed-signal blocks, from LDOs to battery management, ensuring high performance and robust verification.

You will drive cross-functional collaboration with Digital, Verification, Layout, and Test Engineering to optimize power, area, and performance while overseeing post-silicon validation