PMIC Digital Design Lead - Mixed-Signal

Celera Semiconductor; San Francisco (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Celera Semiconductor is seeking a Digital Design Lead to own the digital architecture, RTL implementation, and system integration of PMICs in a fast-paced environment.

The role requires 10+ years in digital IC design with PMIC/Mixed-Signal focus, strong SystemVerilog/Verilog RTL skills, and experience with Cadence and Synopsys toolchains. Lead a team through multiple successful tape-outs and collaborate with analog design on top-level integration.

Qualifications

• Bachelor’s or Master’s degree in Electrical or Computer Engineering.
• 10+ years in digital IC design, with at least 5 years focused on PMIC or Mixed-Signal products.
• Proficiency in SystemVerilog/Verilog RTL coding for synthesis.
• Hands-on experience with digital control loops for power converters.
• Familiarity with Cadence Genus/Tempus or Synopsys DesignCompiler/PrimeTime toolsets.
• Process knowledge: BCD nodes and Clock Domain Crossing in mixed-signal environments.

Responsibilities

• Define and document the micro-architecture for PMIC digital cores, including state machines for power sequencing and fault handling.
• Lead digital-on-top integration with analog leads to define interfaces and digital control loops.
• Design high-quality, low-power RTL for PWM controllers, interfaces (I2C, SPI, PMBus, I3C), and OTP/MTP memory controllers.
• Oversee insertion of scan chains, ATPG, and BIST to ensure high production yield and test coverage.
• Develop verification plans and drive Mixed-Signal simulations (Verilog-AMS/Real Number Modeling) to validate hardware–software interactions.
• Lead the synthesis, LEC, and STA flows to ensure the digital logic meets performance targets across process corners.

Skills

Digital Architecture

RTL Design

SystemVerilog/Verilog

PMIC

Mixed-Signal

DFT

Verification

Synthesis/STA

Education

Electrical or Computer Engineering degree

Tools

Cadence Genus/Tempus

Synopsys DesignCompiler/PrimeTime

Job description

Celera Semiconductor is seeking a Digital Design Lead to own the digital architecture, RTL implementation, and system integration of PMICs in a fast-paced environment.

The role requires 10+ years in digital IC design with PMIC/Mixed-Signal focus, strong SystemVerilog/Verilog RTL skills, and experience with Cadence and Synopsys toolchains. Lead a team through multiple successful tape-outs and collaborate with analog design on top-level integration.