Physical Design Engineer

Acceler8 Talent; San Francisco (CA); On-site; USD 225,000 - 250,000; Full time

Job summary

An innovative firm is seeking a talented Physical Design Engineer to join their team, focusing on cutting-edge AI hardware technology. In this role, you will drive the silicon design process, ensuring scalability and performance across various design levels. Collaborating with a dynamic team, you will oversee critical tasks such as floor-planning, placement, and timing closure. This is an exciting opportunity to contribute to groundbreaking advancements in AI hardware, working with industry leaders committed to optimizing performance and cost efficiency. If you are passionate about pushing the boundaries of technology, this role is perfect for you.

Qualifications

• Proven experience guiding physical design from RTL to silicon.
• Expertise in floorplanning, place and route, and timing analysis.

Responsibilities

• Drive silicon and physical design methodology for scalability.
• Take ownership of chip-level physical design tasks.

Skills

Physical Design Methodology

Floor-planning

Placement and Routing

Timing Closure

Verification

Collaboration with DFT

Electrical Sign-off

Job description

1 week ago Be among the first 25 applicants

This range is provided by Acceler8 Talent. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$225,000.00/yr - $250,000.00/yr

Direct message the job poster from Acceler8 Talent

Recruiting the top AI Hardware Engineers in the world.

Acceler8 Talent has recently partnered with a company that is redefining AI hardware, focusing on maximizing performance for large language models (LLMs) like GPT. With a commitment to cost efficiency and optimizing performance-per-dollar, their technology offers competitive latency and low-level hardware control. Their scalable hardware enables faster model development and accessibility for researchers and startups.

Founded by two previous leaders of a FAANG company, they are leading the charge as the compute platform for AGI, crafting comprehensive solutions from silicon to systems.

They are actively looking for a Physical Design Engineer

Responsibilities:

• Drive their silicon and physical design methodology, ensuring scalability across various design levels.
• Take ownership of entire subsystems or subsets and/or chip-level physical design tasks, including floor-planning, placement, routing, timing closure, and verification.
• Lead reviews and progress reporting, focusing on key metrics to achieve silicon milestones like design freeze and tapeout.
• Collaborate closely with design, DFT, and other physical design stakeholders to deliver top-tier performance, power, and area results.
• Coordinate with design services partners and third-party vendors for block-level and chip-level

Requirements:

• Proven experience in guiding physical design from RTL to silicon for subsystems and/or top-level functions in ASICs and SOCs.
• Demonstrated expertise in floorplanning, place and route, clock tree insertion, timing analysis, physical verification, and electrical sign-off.
• Project experience collaborating with design, verification, and DFT teams to optimize designs for performance, power, and area.
• Experience working with third-party design services partners to take designs from initial floor plan to sign-off and tapeout is desirable.

If interested in joining them please apply here or reach out to [e-mail]

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Design, Engineering, and Management

• Industries

  Software Development, Semiconductor Manufacturing, and Computer Hardware Manufacturing

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