Physical Design Engineer

National Computer Systems; Piscataway Township (NJ); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Bonus based on performance

Paid time off

Training & development

Job summary

National Computer Systems is seeking a Physical Design Engineer for a 5 days onsite role in San Jose, CA. You will drive the full physical design flow from RTL to tape-out, including synthesis, verification and timing closure, with emphasis on clock tree synthesis and STA.

Ideal candidates have TCL/Perl scripting skills, proficiency with EDA tools, and excellent communication. Bachelor's in Electrical Engineering or Electronics required.

Qualifications

• Bachelor’s degree in Electrical Engineering or Electronics is required.
• Experience with physical design flows and RTL-to-tapeout.
• Proficiency in TCL/Perl scripting and EDA tools.
• Strong verbal and written communication skills.

Responsibilities

• Execute physical design, synthesis, physical verification and timing closure.
• Setup and synthesize RTL.
• Achieve timing closure using multiple methods; focus on clock trees and STA.
• Collaborate with RTL engineers during floorplanning and flow development.
• Balance floorplanning and layout with design methodologies.

Skills

TCL scripting

PERL scripting

EDA tools proficiency

RTL to tape-out

Verbal and written communication

Education

Bachelor’s degree in Electrical Engineering or Electronics

Tools

EDA Tools

Job description

Physical Design Engineer-

Location: San Jose CA- 5 Days onsite

What will you do :

• Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure
• Setup and Synthesizing RTL
• Timing closure through various methods and strategies; preferable in-depth experience in

top-level STA

• EM/IR Analysis,
• Place and Route
• Clock Tree Synthesis; experience with custom clock trees, insertion reduction and skew

balancing techniques

• Floor-planning and Layout; preferable in-depth experience in top-level floorplanning
• Flow and Methodology Development
• Collaborating with IC Design RTL Engineers

What you will Bring:

• TCL/PERL Scripting
• Proficiency in related EDA Tools
• Full physical design cycle experience: RTL to Tape-out
• Excellent verbal and written communication skills

Education and Experience Requirements:

• Minimum: Bachelor’s degree required in Electrical Engineering or Electronics

Benefits:

• Bonus based on performance
• Paid time off
• Training & development