Performance Infrastructure Engineer for Next-Gen CPU

Tenstorrent; California (MO); Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent is seeking a talented engineer to join the CPU design team, driving infrastructure for performance analysis, correlation, and verification. You will work on a RISC-V based CPU, collaborating with core architects and RTL teams to deliver a highly efficient design.

The role is hybrid, located in Austin, TX or Santa Clara, CA, with opportunities across experience levels. Strong candidates will have expertise in C++ and Python, experience with verification and high-performance CPU

Qualifications

• Proficient in C++ and Python with experience using industry-standard tools.
• Experience with verification infrastructure and CPU architecture concepts.
• Proven ability to debug RTL and logic across design hierarchies.

Responsibilities

• Drive CPU microarchitecture improvements and verify RTL against performance models.
• Enhance the design environment and development workflows for efficiency.
• Own the performance correlation framework, including tracking and visualization tools.
• Collaborate with RTL engineers and core architects to hit performance targets.

Skills

C++

Python

Performance analysis

Verification

RTL debugging

Tools

Simulation tools

Emulation tools

Open-source tools

Job description

Tenstorrent is seeking a talented engineer to join the CPU design team, driving infrastructure for performance analysis, correlation, and verification. You will work on a RISC-V based CPU, collaborating with core architects and RTL teams to deliver a highly efficient design.

The role is hybrid, located in Austin, TX or Santa Clara, CA, with opportunities across experience levels. Strong candidates will have expertise in C++ and Python, experience with verification and high-performance CPU