Package Assembly Process Development Integration Engineer

Intel Corporation; Chandler (AZ); On-site; USD 89,000 - 171,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Paid time off

Job summary

Intel Corporation in Arizona is seeking a Process Integration and Yield Engineer to drive technology transfer and optimize manufacturing processes. You will define roadmaps, establish workflows, and use data-driven insights to improve product quality, yield, and operations.

The role sits in the Assembly Package Test Manufacturing (APTM) group, focusing on advanced packaging programs and cross-functional collaboration across die-package interfaces, process flow, and cost-effective solutions to

Qualifications

• Bachelor's degree in Engineering or related field with relevant experience.
• Experience in semiconductor manufacturing or related industry preferred.
• Strong collaboration and problem-solving skills required.

Responsibilities

• Lead development and data collection for TV and product lines.
• Serve as key contact for process-level issues in package assembly.
• Plan and manage DOE studies to support technology development and yield improvements.
• Coordinate substrates and materials to meet cost and schedule targets.
• Collaborate with stakeholders to deliver holistic, data-driven solutions.

Skills

Communication skills

Collaboration

Problem solving

Attention to detail

Education

Bachelor's degree in Engineering

Tools

CSAM

X-ray

XPS

FTIR

SEM

EDX

Job description

Job Details:

Job Description:

Job Description

As a Process Integration and Yield Engineer at Intel, you will play a pivotal role in driving technology transfer and optimizing manufacturing processes. You will define process integration roadmaps, establish workflows, and ensure continuous improvement. By leveraging data-driven insights and collaborating with stakeholders, your work will directly contribute to enhancing product quality, yield, and overall operational excellence.

The Assembly Package Test Manufacturing (APTM) organization owns a fundamental and fast-growing portion of Intel's foundry business. In addition to traditional product types, we drive Intel's advanced packaging strategy. In the Package Assembly Process Development Integration Engineer role, you will be part of the Arizona Package Assembly Development Integration team within APTM owning development activities and running working groups and task forces to address key risks for key Intel Advanced Packaging Programs.

Key Responsibilities

• Manage development and baseline data collection activities (for TV and Products).
• Key contact for process level issues within package assembly
• Manage DOE plans and data collection activities that support key technology development areas related to die-package interactions, process flow development and qualification, yield improvement, process spec validation, design rule validation, identify and implement cost effective wafer level / assembly / substrate solutions that enable a robust die-package process and architecture.
• Manage substrates and materials to meet forecasted costs and schedule.
• Engage and work closely with stakeholders to deliver holistic solutions to the problems.
• Develop solutions to problems utilizing statistical knowledge and problem-solving tools.
• Achieve timely results by working across organizational boundaries, fostering an inclusive and innovative culture.

The successful candidate should be willing and able to travel occasionally, as required to support the needs of the business.

The candidate should exhibit the following behavioral traits:

• Exceptional communication skills.
• Collaboration
• Innovative thinking
• Attention to detail
• Proactive problem-solving
• Curiosity and continuous learning
• Make technical decisions and provide technical direction
• Effectively work in a highly networked, cross organization role
• Exhibit strong team building and influencing skills

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

1. Candidate must possess a Bachelor's degree with 3+ years of experience, OR Master's Degree with 2+ years of experience, OR PhD degree in Engineering with 1+ years of experience.

The experience listed above should be in any of the following:

• Semiconductor experience
• Manufacturing experience
• Advance assembly packaging experience

Preferred Qualifications

3+ years of experience in the following:

• Focus on fundamental understanding of advanced packaging process development.
• Knowledge of Package Assembly NPI methodology, DOE and statistical Process control.
• Knowledge of characterization techniques such as CSAM, Xray, XPS, FTIR, SEM, EDX.
• Experience in package design, assembly process interaction is a plus.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Annual Salary Range for jobs which could be performed in the US: $89,010.00-170,630.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Work Model for this Role

This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.