Mixed-Signal Verification Engineer

Lumicity; San Jose (CA); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

None

Job summary

Lumicity is seeking a Senior Mixed-Signal Verification Engineer in San Jose to lead verification planning, develop advanced testbenches, and drive coverage closure across complex analog/digital interfaces.

You will build SystemVerilog-based models, execute SPICE-based simulations, and collaborate with design teams to debug issues and ensure pre-silicon sign-off. Proficiency in Python scripting and verification automation is highly valued.

Qualifications

• 5+ years in mixed-signal IC verification.
• Deep understanding of analog/mixed-signal design concepts and verification methodologies.
• Experience with SystemVerilog, SPICE-based simulation, and verification automation.

Responsibilities

• Lead verification planning, testbench development, and coverage closure.
• Develop SystemVerilog-based models and verification environments for analog and digital interfaces.
• Perform simulation-based verification, functional correlation, and equivalence analysis across mixed-signal blocks.
• Collaborate with analog/digital design teams to debug issues and support pre-silicon verification and sign-off.

Skills

SystemVerilog

Mixed-signal verification

SPICE simulation

Verification automation

Python scripting

Testbench development

Tools

Cadence

Synopsys

Verilog simulators

Job description

Senior Mixed-Signal Verification Engineer

• Lead verification planning, testbench development, and coverage closure for complex mixed-signal semiconductor designs.
• Develop SystemVerilog-based behavioral models and verification environments for analog and digital interfaces.
• Perform simulation-based verification, functional correlation, and equivalence analysis across mixed-signal blocks.
• Partner with analog and digital design teams to debug issues and support pre-silicon verification and sign-off.
• Develop automation scripts and verification utilities to improve efficiency, regression coverage, and workflow scalability.
• Verify a range of analog and mixed-signal subsystems, including signal-processing, power, timing, and interface circuitry.
• Use industry-standard circuit simulators, HDL simulation environments, and scripting languages such as Python and Perl for verification and analysis.

Qualifications

• 5+ years of experience in mixed-signal IC verification or a closely related field.
• Strong understanding of analog/mixed-signal design concepts, SystemVerilog, SPICE-based simulation, and verification methodologies.
• Experience with behavioral modeling, simulation/debugging, coverage analysis, and verification automation.
• Strong analytical, communication, collaboration, and problem-solving skills.