Mixed-Signal Design Verification and Validation Engineer

Broadcom; San Jose (CA); On-site; USD 119,000 - 190,000; Full time

Job summary

An established industry player is seeking a senior Mixed Signal Design Verification engineer to join their dynamic team. In this highly visible role, you will work on ASICs for data center connectivity applications, leveraging your extensive experience in mixed signal design verification. You will engage with both technical and management levels, contributing to innovative solutions and ensuring high-quality verification processes. This role offers a competitive salary and comprehensive benefits, making it an exciting opportunity for professionals looking to make a significant impact in the technology sector.

Benefits

Medical Insurance

Dental Insurance

Vision Insurance

401(k) with Company Match

Employee Stock Purchase Program

Paid Holidays

Sick Leave

Vacation

Qualifications

• 8+ years of experience in Mixed Signal Design Verification.
• Hands-on experience with SV UVM and verification coverage matrix.

Responsibilities

• Develop and maintain verification environments for ASICs.
• Write regression tests and develop verification plans.

Skills

Mixed Signal Design Verification

SV UVM

SV RNM

Regression Tests

Analog Mixed-Signal Knowledge

EDA Tools (Synopsys, Cadence)

GLS Simulations

Verification of DFT Designs

Communication Skills

Time Management

Education

BSc in Electrical or Computer Engineering

MSc in Electrical or Computer Engineering

Tools

Synopsys

Cadence

Job description

Job Application Instructions:

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Job Description:

Broadcom is seeking a senior Mixed Signal Design Verification engineer for a highly visible role working on ASICs for data center connectivity applications.

Qualifications include:

• BSc in Electrical or Computer Engineering with 8+ years of experience or MSc with 6+ years of experience in Mixed Signal Design Verification.
• Hands-on experience with SV UVM, SV RNM, and verification coverage matrix.
• Experience in writing regression tests, developing checkers, assertions, and verification plans.
• Knowledge of analog mixed-signal building blocks such as ADCs, DACs, PLLs, and SerDes.
• Experience generating randomized vectors for analog and digital behavioral model verification.
• Proficiency with industry-standard EDA tools like Synopsys and Cadence.
• Experience with GLS simulations, with or without parasitic annotations.
• Background in verification of DFT designs, architectures, and microarchitectures.
• Experience developing verification environments for DFT patterns such as Stuck, Transition, MBIST, Boundary Scan.
• Knowledge of Memory BIST controllers with built-in repair features is a plus.
• Self-motivated team player.

Highly Desired Qualifications:

• Strong communication skills, capable of engaging with technical and management levels.
• Proactive, collaborative, and innovative approach to technical development.
• Excellent time management and interpersonal skills.

Additional Job Details:

Compensation and Benefits:

Annual salary ranges from $119,000 to $190,000. Eligible for discretionary bonuses and equity awards as per company plans.

Broadcom offers comprehensive benefits including medical, dental, vision, 401(k) with company match, Employee Stock Purchase Program, Employee Assistance Program, paid holidays, sick leave, and vacation. The company complies with all applicable laws regarding leaves of absence.

Equal Opportunity Employer:

Broadcom is committed to equal employment opportunity regardless of race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability, medical condition, pregnancy, veteran status, or other protected characteristics. Qualified applicants with criminal records will be considered in accordance with local laws.

Additional Instructions:

If applying from outside the USA, please provide a home address for future correspondence.