DRAM Product Strategy & Planning Lead

Samsung Semiconductor, Inc.; San Jose (CA); Presencial; USD 163.000 - 253.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Charitable matching—give back

Paid time off

Fertility support

Therapy services

Onsite gym

Flexible environment

Descripción de la vacante

Samsung Semiconductor, Inc. is seeking a DRAM Product Planning Manager to drive customer adoption and lead cross‑functional teams from design‑in to final qualification at our San Jose headquarters. Expect daily onsite presence with up to 10% travel domestically or internationally.

The role demands 10+ years (or 8+ with a Master’s, or 5+ with a PhD) in memory systems, DRAM knowledge, and strong collaboration with foundries and design houses to shape next‑gen memory architectures.

Formación

• Bachelor’s degree in Electrical Engineering, Computer Science, or related Physical Science with 10+ years of experience or Master’s with 8+ years or PhD with 5+ years in industry.
• Memory and system design knowledge for DRAM/ memory hierarchy.
• Background in SI/PI (Signal/Power Integrity) and timing measurements.

Responsabilidades

• Drive technical engagements with customer engineering teams to position Samsung DRAM solutions as the primary choice.
• Facilitate engineering debugging and troubleshooting through evaluation, qualification, and mass production phases.
• Analyze customer architectures to propose optimized memory solutions and interfaces.

Conocimientos

Memory design

System operations

SI/PI

2.5D/3D integration

Customer leadership

Travel ability

HBM4+ architecture

IP integration planning

Foundry collaboration

PPA optimization

Educación

Bachelor’s in EE/CS/Physical Science

Master’s in EE/CS/Physical Science

PhD in related field

Descripción del empleo

Samsung Semiconductor, Inc. is seeking a DRAM Product Planning Manager to drive customer adoption and lead cross‑functional teams from design‑in to final qualification at our San Jose headquarters. Expect daily onsite presence with up to 10% travel domestically or internationally.

The role demands 10+ years (or 8+ with a Master’s, or 5+ with a PhD) in memory systems, DRAM knowledge, and strong collaboration with foundries and design houses to shape next‑gen memory architectures.