Memory Systems Architect for High-Performance AI Silicon

SBT

San Francisco (CA)

On-site

USD 180,000 - 280,000

Full time

13 days ago

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Job summary

SBT is confidentially developing advanced compute silicon with a focus on high-performance memory subsystems. The role involves defining architecture, designing memory arrays, and coordinating with CPU, SoC, andFoundry teams to integrate memory IP from early design through production.

Ideal candidates have deep expertise in SRAM, cache memory, register files, timing circuits, and peripheral logic, and can drive multi-silicon programs from concept to tapeout with strong cross-functional

Qualifications

  • Extensive expertise in memory circuit design, memory architecture, or custom digital and mixed-signal circuit development.
  • Proven ownership of memory IP or memory subsystems across multiple silicon programs, from initial design through tapeout and silicon bring-up.
  • Strong 0-to-1 development experience creating new memory architectures, circuits, or reusable IP from a blank-sheet starting point.
  • Deep expertise in SRAM, cache memory, register files, memory arrays, sense amplifiers, write drivers, timing circuits, and peripheral logic.
  • Strong understanding of transistor-level design, process variation, power reduction, timing closure, signal integrity, and physical implementation.
  • Demonstrated ability to work across architecture, RTL, verification, layout, DFT, physical design, foundry, and validation teams to deliver production-ready silicon.

Responsibilities

  • Define the architecture and circuit implementation of high-performance memory subsystems for advanced compute silicon.
  • Lead the design of memory arrays, peripheral circuits, control logic, and interfaces optimized for power, performance, area, and reliability.
  • Drive memory technology decisions across SRAM, cache structures, register files, and other embedded memory applications.
  • Partner with CPU, SoC, physical design, verification, and process technology teams to integrate memory IP into complex silicon products.
  • Own circuit-level tradeoff analysis, modeling, characterization, and design reviews throughout the development lifecycle.

Skills

Memory circuit design
Memory architecture
Custom digital & mixed-signal

Job description

SBT is confidentially developing advanced compute silicon with a focus on high-performance memory subsystems. The role involves defining architecture, designing memory arrays, and coordinating with CPU, SoC, andFoundry teams to integrate memory IP from early design through production.

Ideal candidates have deep expertise in SRAM, cache memory, register files, timing circuits, and peripheral logic, and can drive multi-silicon programs from concept to tapeout with strong cross-functional

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