Senior AI System Architect for Memory & Compute

Sandisk

Milpitas (CA)

On-site

USD 170,000 - 260,000

Full time

14 days+
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Job summary

Sandisk is seeking a System Architect to drive system-level solutions for advanced memory technologies and AI inference infrastructure in Milpitas, CA. You will optimize compute-memory bottlenecks, latency, and power while mapping workloads to hardware across chiplet, SoC, and software co-design.

The role demands deep memory technology expertise, proficiency in C/C++, Python, RTL, and strong collaboration to guide design teams and deliver scalable, high-performance solutions.

Qualifications

  • Master's or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science.
  • 10+ years in System Architecture, SoC design, and memory system development.
  • Knowledge of DRAM, DDR, LPDDR, GDDR, NAND technologies.
  • Experience with AI accelerators, GPUs, Neural Processing Engines.
  • Proficiency in C/C++, Python, RTL design, and system-level modeling.
  • Familiarity with PCIe, CXL, NoCs, Ethernet, RDMA interconnects.

Responsibilities

  • Define system-level architecture co-optimized with software.
  • Develop performance and power models for optimization.
  • Map AI/ML workloads to hardware requirements.
  • Collaborate across software and hardware teams for memory subsystems and interconnects.
  • Explore advanced memory concepts like in-memory/near-memory computing and novel packaging.
  • Provide technical leadership and documentation for design teams.

Skills

Memory technologies
C/C++
Python
RTL design
System-level modeling
AI accelerators
Interconnects (PCIe, CXL, NoCs)
Communication & mentorship

Education

Master's or PhD in Electrical/Computer Engineering or CS

Job description

Sandisk is seeking a System Architect to drive system-level solutions for advanced memory technologies and AI inference infrastructure in Milpitas, CA. You will optimize compute-memory bottlenecks, latency, and power while mapping workloads to hardware across chiplet, SoC, and software co-design.

The role demands deep memory technology expertise, proficiency in C/C++, Python, RTL, and strong collaboration to guide design teams and deliver scalable, high-performance solutions.

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