Memory Systems Architect for AI & Data Center

Micron Memory Malaysia Sdn Bhd; San Jose (CA); On-site; USD 146,000 - 286,000; Full time

Job summary

Micron Technology in San Jose, California, seeks a System Architect to lead performance modeling and analysis for next‑generation memory architectures across AI, server, data center, and mobile platforms.

You will build and validate timing-approximate and cycle-accurate models, translate results into architecture guidance, and collaborate with cross‑functional teams to shape product decisions. Strong expertise in memory systems and high‑level modeling is essential.

Qualifications

• Bachelor's degree or higher in Electrical/Computer Engineering or Computer Science.
• 5+ years in system architecture and performance modeling.
• Experience developing cycle-accurate models for memory systems/SoC designs.
• Strong programming skills in C++ and Python.

Responsibilities

• Develop and maintain timing-approximate and cycle-accurate models of memory devices, controllers, interconnects, processors, and SoC subsystems.
• Perform component- and system-level performance analysis, benchmarking, and characterization across AI, server, and mobile workloads.
• Select simulation tools and environments and build workloads with metrics like latency, bandwidth, energy, and cycle-level statistics.
• Collaborate with cross-functional teams and external customers to optimize architectures and provide data-driven guidance on microarchitecture tradeoffs.
• Integrate and document models into larger SoC- and platform-level performance frameworks, identifying bottlenecks and recommending corrective actions.

Skills

System architecture

Performance modeling

SoC design

Memory systems

Cycle-accurate models

C++

Python

Education

Bachelor's degree or higher in EE/CE/CS

Master's or PhD preferred

Tools

gem5

SystemC

SST

Sniper

Job description

Micron Technology in San Jose, California, seeks a System Architect to lead performance modeling and analysis for next‑generation memory architectures across AI, server, data center, and mobile platforms.

You will build and validate timing-approximate and cycle-accurate models, translate results into architecture guidance, and collaborate with cross‑functional teams to shape product decisions. Strong expertise in memory systems and high‑level modeling is essential.