Memory & Storage SoC RTL Design Engineer

CyberCoders; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical

Dental

Vision

PTO

401k

Job summary

CyberCoders is seeking hardware engineers to help build the next generation of memory and storage SoCs. You’ll contribute to high-performance, low-power designs and RTL implementation using Verilog/SystemVerilog, while collaborating with teams across the United States, China, and Taiwan.

Ideal candidates have a Master’s in Electrical Engineering and 1+ year in semiconductor design, with expertise in RTL design, OVM/UVM, and SoC development.

Qualifications

• Master's Degree in Electrical Engineering (MSEE) or closely related field.
• Minimum 1+ year of industry experience in semiconductor design.
• Experience with SoC Design, ASIC Development, RTL Design, Front-End Design, Digital Logic Design, Verilog and/or SystemVerilog, OVM and/or UVM Methodologies.

Responsibilities

• Design and develop microarchitectures for high-performance, low-power SoCs.
• Implement RTL using Verilog/SystemVerilog.
• Participate in architectural planning, design reviews, and technical decision-making.
• Develop and optimize digital logic blocks for storage and memory-related products.
• Support SoC integration, including soft-IP RTL integration and hard-IP macro integration.
• Collaborate with verification, physical design, firmware, architecture, and product teams.
• Analyze performance, power, timing, and area tradeoffs.
• Support design bring-up and silicon validation activities.

Skills

SoC Design

ASIC Development

RTL Design

Front-End Design

Digital Logic Design

Verilog

SystemVerilog

OVM/UVM

Microarchitecture

Education

Master's Degree in Electrical Engineering

Tools

Verilog/SystemVerilog

Job description

CyberCoders is seeking hardware engineers to help build the next generation of memory and storage SoCs. You’ll contribute to high-performance, low-power designs and RTL implementation using Verilog/SystemVerilog, while collaborating with teams across the United States, China, and Taiwan.

Ideal candidates have a Master’s in Electrical Engineering and 1+ year in semiconductor design, with expertise in RTL design, OVM/UVM, and SoC development.