Memory Silicon Validation Engineer: Parametric Testing Lead

Socket.dev; Mendota Heights (MN); On-site; USD 110,000 - 176,000; Full time

Benefits offered by this job

Medical, dental & vision

401K with match

ESPP

EAP

Holidays

Sick leave

Vacation

Family leave

Other leaves

Job summary

Broadcom is seeking an energetic electrical engineer to join our memory test and failure analysis team, focusing on silicon validation for memory compilers on the latest process technology. You will contribute to test hardware, software development, data acquisition and analysis to drive production readiness.

The role favors hands-on individuals with strong Python and C++ skills, experience with lab equipment, and a passion for leading edge memory architectures in high performance and low power

Qualifications

• Coursework or experience in CMOS memory or datapath circuit design.
• Strong knowledge of SRAM transistor-level behavior and failure modes.
• Proficiency with Linux and shell scripting.

Responsibilities

• Lead development of memory parametric test structures and integrate into test chips.
• Define memory content on product test chips and ensure testing requirements are met.
• Configure lab and test equipment for computer-controlled data acquisition.
• Create, modify and debug memory test software using Python.
• Conduct memory testing and analyze data with Python and spreadsheets.
• Summarize test results and communicate with memory design team.

Skills

Python

C++

Memory architectures

Lab equipment

Education

Bachelor's Degree in CMOS memory or datapath circuit design

Master's Degree in related field

Tools

Perl

Tcl

Shell scripting

Job description

Broadcom is seeking an energetic electrical engineer to join our memory test and failure analysis team, focusing on silicon validation for memory compilers on the latest process technology. You will contribute to test hardware, software development, data acquisition and analysis to drive production readiness.

The role favors hands-on individuals with strong Python and C++ skills, experience with lab equipment, and a passion for leading edge memory architectures in high performance and low power