Memory Quality & Reliability Engineer

Intel Corporation; Folsom (CA); Hybrid; USD 156,000 - 220,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation in the United States seeks an experienced Memory Quality and Reliability Engineer to drive post-silicon memory characterization, certification, and technology readiness for SRAM, RF, and fuse arrays. You will improve methodologies, analyze large silicon datasets, and guide PDK releases with cross-functional collaboration.

Responsibilities include developing predictive models, performing Sil2Sim analyses, generating risk projections, and presenting findings to engineering

Qualifications

• Ph.D. in Electrical Engineering, Computer Engineering, Physics or related, with 2+ years industry experience.
• 2+ years hands-on experience with memory testing.
• 2+ years of quantitative analysis on memory/semiconductor data using DOE, SPC, regression, hypothesis testing or multivariate analysis.
• 2+ years using JMP and Python for data analysis, modeling, optimization, automation or visualization.

Responsibilities

• Plan and execute memory technology certification for SRAM, RF and Fuse arrays.
• Define test strategies, criteria, and readiness requirements for memory arrays.
• Characterize memory across operating conditions to evaluate Vmin, Vmax, aging, variability and margins.
• Analyze silicon data to identify performance gaps, trends, and risks.
• Develop and maintain silicon-based Vccmin/Vmax predictive models for certification and PDKs.
• Perform Sil2Sim correlation assessments and investigate discrepancies between silicon and design.

Skills

Memory testing

Data analysis

Problem solving

Cross-functional collaboration

Education

Ph.D. in Electrical Engineering or related with 2+ years experience

M.S. in Electrical Engineering, Computer Engineering, Physics, Materials Science, or related with 6+ years

Tools

JMP

Python

SQL

Job description

Intel Corporation in the United States seeks an experienced Memory Quality and Reliability Engineer to drive post-silicon memory characterization, certification, and technology readiness for SRAM, RF, and fuse arrays. You will improve methodologies, analyze large silicon datasets, and guide PDK releases with cross-functional collaboration.

Responsibilities include developing predictive models, performing Sil2Sim analyses, generating risk projections, and presenting findings to engineering