Memory Controller Architect for High-Performance SoCs

Qualcomm; San Diego (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego is seeking a Staff Memory Controller Architecture and Design Engineer to define, model, and implement IP for high performance, low power memory controllers in world‑class SoCs.

You will collaborate with software and hardware teams to optimize design, verification, and integration, while documenting architectures and validating against system requirements. The role requires strong ASIC expertise and effective communication with senior leadership.

Qualifications

• Bachelor's degree with 4+ years of ASIC design/verification experience.
• Master's degree with 3+ years of ASIC design/verification experience.
• PhD with 2+ years of ASIC design/verification experience.

Responsibilities

• Define, model, design, optimize, verify, validate, implement, and document IP for high performance ASICs.
• Collaborate with cross-functional teams to determine product execution paths.
• Evaluate process flows from high-level design to place and route and timing/power optimization.
• Write and review detailed technical documentation for EDA/IP/ASIC projects.
• Mentor team members and interact with senior leadership as needed.

Education

Bachelor's degree in Science/Engineering or related field

Master's degree in Science/Engineering or related field

PhD in Science/Engineering or related field

Tools

RTL to GDS Flow

Virtuoso

Job description

Qualcomm Technologies, Inc. in San Diego is seeking a Staff Memory Controller Architecture and Design Engineer to define, model, and implement IP for high performance, low power memory controllers in world‑class SoCs.

You will collaborate with software and hardware teams to optimize design, verification, and integration, while documenting architectures and validating against system requirements. The role requires strong ASIC expertise and effective communication with senior leadership.