Memory Controller Architect & Director for AI Datacenters

Semiconductor Engineering

San Jose (CA)

On-site

USD 190,000 - 270,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Rambus is seeking an exceptional Memory Controller Architect and Technical Director to join the Silicon IP (SIP) team. You will architect high-performance memory controllers for data centers and AI applications, and contribute as an engineering leader while still operating as an individual contributor.

This is a full-time leadership role in a fast-growing semiconductor environment. You will report to the VP of Engineering and collaborate with top inventors and engineers to push memory technology

Responsibilities

  • Architect high-performance memory controllers for data centers and AI applications.
  • Report to the VP of Engineering in a full-time leadership role as an individual contributor.

Job description

Rambus is seeking an exceptional Memory Controller Architect and Technical Director to join the Silicon IP (SIP) team. You will architect high-performance memory controllers for data centers and AI applications, and contribute as an engineering leader while still operating as an individual contributor.

This is a full-time leadership role in a fast-growing semiconductor environment. You will report to the VP of Engineering and collaborate with top inventors and engineers to push memory technology

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Memory Controller Architect & Technical Director, SIP
Memory Controller Architect & Technical Director, SIP

Semiconductor Engineering • San Jose (CA)

On-site
USD 180,000 - 300,000
SPE Hardware Architecture Rambus
SPE Hardware Architecture Rambus

Semiconductor Engineering • San Jose (CA)

On-site
USD 190,000 - 270,000
SPE HARDWARE ARCHITECTURE
SPE HARDWARE ARCHITECTURE

Semiconductor Engineering • San Jose (CA)

On-site
USD 180,000 - 300,000
Senior PCIe Controller Architect & Technical Director
Senior PCIe Controller Architect & Technical Director

Rambus.com • San Jose (CA)

Hybrid
USD 189,700 - 352,300
Base salary
Bonus
Equity
+2
Principal Logic Design Engineer, Memory Controllers
Principal Logic Design Engineer, Memory Controllers

Rambus • Hillsboro (OR)

Hybrid
USD 127,000 - 237,000
Competitive compensation package
401(k) matching
Employee stock purchase plan
+2
Senior Memory Subsystem Architect for DDR5/6 & HBM
Senior Memory Subsystem Architect for DDR5/6 & HBM

Rambus • San Jose (CA)

Hybrid
USD 180,000 - 334,000
Hybrid work model
Memory Subsystem Architect: DDR6/HBM & High-Speed PHY
Memory Subsystem Architect: DDR6/HBM & High-Speed PHY

Rambus.com • San Jose (CA)

Hybrid
USD 180,000 - 334,000
IO and Memory Sub-Sytem Architecture
IO and Memory Sub-Sytem Architecture

Rambus.com • San Jose (CA)

Hybrid
USD 180,000 - 334,000
Lead Logic Design Engineer, High-Perf Memory
Lead Logic Design Engineer, High-Perf Memory

Rambus.com • Hillsboro (OR)

Hybrid
USD 127,000 - 237,000
Bonus
Equity
401(k) matching
+4
Technical Director PCIe Controller Architect
Technical Director PCIe Controller Architect

Rambus • Hillsboro (OR)

Hybrid
USD 189,000 - 353,000
Competitive compensation package
Comprehensive medical and dental benefits
Employee stock purchase plan
+1