IO and Memory Sub-Sytem Architecture

Rambus.com; San Jose (CA); On-site; USD 180,000 - 334,000; Full time

Job summary

Rambus is seeking a Senior Principal Engineer in San Jose, CA, to lead memory subsystem architecture for next-generation DRAM solutions. You will drive DDR5/6, LPDDR5/6, and HBM architectures, collaborate with ASIC/PHY teams, and guide design verification and interoperability efforts.

The role reports to the VP of Engineering within the Memory Interface Division, and Rambus emphasizes hybrid work with onsite emphasis and remote options.

Qualifications

• Master’s Degree in Electrical/Computer Engineering.
• 12+ years in semiconductor, ASIC, memory, or high-speed interface development.
• Experience leading complex technical projects and influencing architectural decisions.
• Ability to present to engineering leadership and customers.

Responsibilities

• Lead architecture, design, and development of memory subsystem solutions.
• Drive decisions on memory interfaces, PHY, signal & power integrity, and system integration.
• Define subsystem requirements and translate system needs into architecture/design specs.
• Provide technical leadership across ASIC, PHY, firmware, validation, and platform teams.
• Develop expertise-driven memory solutions including DDR4/5/6, LPDDR4/5/6, HBM3/4/5 DRAM.
• Lead bring-up, debugging, characterization, and performance optimization.

Skills

System Architecture

Memory Expertise DDR5/6

High-Speed PHY Design

Tx/Rx Architectures

DFE/CTLE

Digital Verification

Executive Presentations

Education

Master's Degree in Electrical/Computer Engineering

Job description

Overview

Rambus, a premierchip and silicon IP provider making data faster and safer,is seekingto hirean exceptionalSenior Principal Engineerto joinourMICteaminSan Jose, CA.In this role, youwill beworking withsome of the brightest inventors and engineers in the world developingproductsthat make data faster and safer.

As aSenior Principal Architect of Memory & IO Sub-system,you’ll play a pivotal role inleading the architecture, design, and development of next generation ofDRAMsub-system solutionsfor server andhigh-performancecomputing applications. In thisfull-timerole, you’ll report directly to ourVP of Engineering. OurMemory Interface Divisionis dedicated todevelopingallproductsrelated toServer and Client Memory Modules, and your contributions will be instrumental indevelopingsolutions DDR6/LPDDR6/HBM solutions for Server and Clientsystems.

Rambus offers a flexible work environment, embracinga hybrid approach formostoffice-basedroles.Employeesare encouragedtospend an average of at leastthree days per weekonsite,allowing fortwodaysof remote work.

Responsibilities

Lechnical Leadership

• Lead the architecture, design, and development of next generation of memory subsystem solutions.

• Drive technical decisions related to memory interfaces, PHY architecture, signal & power integrity, and system integration.

• Define subsystem requirements and translate system-level needs into architecture and design specifications.

• Provide technical leadership across multidisciplinary teams including ASIC, PHY, firmware, validation, system architecture, and platform engineering.

Memory Subsystem Development

• Develop expertise-driven solutions involving:

• DDR4/5/6, LPDDR4/5/6, HBM3/4/5 DRAM

• DDR4/5/6 Registered Clock Driver (RCD)

• DDR4/5/6 Data Buffer (DB)

• DDR4/5/6 DIMMs (RDIMM/LRDIMM/MRDIMM)

• DDR4/5/6 Server Platforms

• Analyze memory subsystem performance, timing, power, and interoperability requirements.

• Drivesystemsbring-up, debug, characterization, and performance optimization activities.

PHY Architecture and Design

• Define and review high-speed PHY architectures for next-generation memory and interface products.

• Develop and optimize:

• Transmitter (Tx) architectures

• Receiver (Rx) architectures

• Clocking and timing circuits

• Equalization schemes including DFE, CTLE, and related signal-conditioning techniques

• Evaluate signal integrity challenges and develop solutions to improve channel performance and margin.

Digital Design and Verification

• Contribute to digital design, architecture reviews, and RTL implementation strategies.

• Define verification methodologies and coverage requirements.

• Lead debugging and root-cause analysis of complex design and system-level issues.

• Collaborate with validation teams to ensure robust product functionality and compliance.

Specification and Customer Engagement

• Develop and maintain architecture specifications, design requirements, and technical documentation.

• Present technical proposals, design reviews, and architecture recommendations to engineering leadership, customers, and ecosystem partners.

• Translate JEDEC and industry standards into product requirements and implementation guidelines.

• Participate in customer discussions, technical reviews, and interoperability initiatives.

Qualifications

Education

• Master’s Degree (M.S.) in Electrical Engineering, Computer Engineering, or a related technical discipline.

Experience

• 12+ years of industry experience in semiconductor, ASIC, memory, or high-speed interface development.

• Demonstrated experience leading complex technical projects and influencing architectural decisions.

Key Competencies

• System Architecture Leadership

• DDR5/DDR6/LPDDR5/HBM Memory Expertise

• High-Speed PHY Design

• Tx/Rx Circuit Architecture

• DFE/CTLE Equalization Techniques

• I2C, I3C, USB Interfaces

• Digital Design & Verification

• Technical Specification Development

• Analytical Problem Solving

• Executive-Level Presentations

About Rambus

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop thecutting-edgeproducts and technologies essential for tomorrow’s systems.

Rambus offers a competitive compensation packageincludingbase salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

TheUSsalary range for thisfull-timeposition is $180,000to $334,200.Our salary ranges aredeterminedby role,levant location. The successful candidate’s starting pay will bedeterminedbased on job-related skills, experience, qualifications, worklocationand market conditions.

At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members haveequitableaccess to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all doourbest work.

Rambus is proud to be an Equal Employment Opportunity and affirmatiIsAa employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veteransduringour job application procedures. If yourequireassistanceoran accommodationdue to a disability,please feel free to inform us in your application.

Rambus does not accept unsolicited resumes from headhunters, recruitmentagenciesor fee-based recruitment services.

For more information about Rambus, visit rambus.com. Foradditionalinformation on life at Rambus and our current openings, check outrambus.com/careers/.