Member of Technical Staff - Design Verification

Acceler8 Talent; San Francisco (CA); Ibrido; USD 120.000 - 180.000; Tempo pieno

Descrizione del lavoro

Acceler8 Talent is seeking an experienced Design Verification Engineer to advance verification across blocks to system-level validation for high-performance silicon. You will own verification in subsystems and full-chip contexts, building robust testbenches and driving closures toward silicon milestones, in a hybrid SF Bay Area role.

Ideal candidates bring 5+ years in design verification, with knowledge of LPDDR/HBM and production experience with modern methodologies such as UVM, AVB, and formal

Competenze

• Experience driving verification from concept-to-silicon.
• Knowledge of LPDDR/HBM.
• Production experience with verification methodologies (UVM, AVB, formal verification).
• Strong understanding of silicon micro-architecture and design concepts for high-performance compute, high-speed connectivity, memory management.

Mansioni

• Contribute to verification methodology and execution across blocks, subsystems, full chip, and system-level validation.
• Own portions of verification execution at subsystem and chip level.
• Create testbenches and drive progress and verification closures toward silicon milestones.

Conoscenze

UVM

AVB

Formal verification

Testbenches

LPDDR/HBM

Silicon debugging

Strumenti

Emulation platforms

Prototyping platforms

Descrizione del lavoro

Acceler8 Talent is looking for an experiencedDesign Verification Engineerto join a high-performing team to help them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you!

Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success.

As the Design Verification Engineer, you’ll be contributing to the verification methodology and execution across blocks, subsystems, full chip, and system-level validation. You’ll own portions of the verification execution at the subsystem and chip level, creating testbenches and executing progress and verification closures toward various silicon milestones. This is a hybrid role based in the San Francisco Bay Area.

This role might be ideal for you if you have:

• Experience driving verification from concept-to-silicon
• Knowledge of LPDDR/HBM
• Production experience with advanced verification methodologies (UVM, AVB, formal verification, etc.)
• Strong understanding of silicon micro-architecture and design concepts used in high-performance compute, high-speed connectivity, memory management, and related functionalities
• 5+ years working in design verification roles

Familiarity with emulation and prototyping platforms and methodologies and hands-on experience with participation in silicon debugging and bring-up are pluses!