Senior AI Hardware Verification Engineer

Acceler8 Talent; San Francisco, Northern (CA, KY); Hybrid; USD 150,000 - 230,000; Full time

Benefits offered by this job

Equity participation

Medical/dental/vision coverage

401(k)

Generous paid time off

Job summary

Acceler8 Talent is partnering with a well-funded AI hardware startup to hire a Senior Design Verification Engineer in San Francisco. You will own verification for major functional areas of a next-generation AI accelerator, working with architecture, RTL, and software teams to ensure first-pass silicon success and scalable verification methodologies for future products.

The role emphasizes AI-assisted workflows, reusable UVM environments, and cross-domain collaboration in a fast-moving startup.

Qualifications

• 5+ years of hands-on pre-silicon verification on ASIC/SoC.
• Experience in block/subsystem or full-chip verification.
• Strong UVM, constrained-random verification, and testbench architecture.
• Ability to translate specs into verification strategies and plans.
• Desire to drive automation and AI-assisted verification workflows.

Responsibilities

• Own verification for a major functional area.
• Define verification strategies across IP, subsystem, SoC, and emulation environments.
• Build AI-assisted workflows to reduce verification cycle times.
• Develop reusable UVM environments, test plans, stimuli, and coverage models.
• Drive functional closure by debugging complex design issues with design/architecture teams.
• Contribute to verification methodology improvements as the organization scales future silicon programs.

Skills

UVM

Verification planning

Debugging

Automation

AI-assisted verification

Tools

Cadence Palladium

Siemens Veloce

Emulation platforms

Job description

Acceler8 Talent is partnering with a well-funded AI hardware startup to hire a Senior Design Verification Engineer in San Francisco. You will own verification for major functional areas of a next-generation AI accelerator, working with architecture, RTL, and software teams to ensure first-pass silicon success and scalable verification methodologies for future products.

The role emphasizes AI-assisted workflows, reusable UVM environments, and cross-domain collaboration in a fast-moving startup.