Lead Verification Architect for Breakthrough Chiplet

Doist; San Jose, Northern (CA, KY); Hybrid; USD 180,000 - 240,000; Full time

Benefits offered by this job

Health, dental, vision

Professional development

Access to cloud platforms

Collaborative cross-functional teams

Job summary

Lumilens in San Jose, CA is seeking a Verification Lead to own end-to-end verification for a pioneering chiplet. As a founding hire, you’ll establish the methodology before RTL exists, shaping coverage strategy and regression infrastructure to accelerate tapeout.

You will drive hardware-assisted verification, emulation/FPGA prototyping, and UCIe/MCIe/VIP integrations while mentoring a growing DV team across multiple domains including MCU datapath and mixed-signal interfaces.

Qualifications

• 10+ years ASIC/SoC verification experience with leadership on complex projects.
• Proven ability to define DV strategy, coverage models, and signoff criteria from block to full-chip.
• Strong expertise in UVM, constrained-random, and regression-driven verification.

Responsibilities

• Own full DV strategy and coverage model for a first-of-its-kind chiplet.
• Stand up regression/CI infrastructure and nightly runs prior to RTL handover.
• Lead and grow the DV team across multiple subsystems and blocks.

Skills

ASIC/SoC verification leadership

UVM/SystemVerilog

Hardware-assisted verification

Regression/CI automation

Team leadership

Education

B.S./M.S. in EE/CS

Tools

UVM

SystemVerilog

Verilog-AMS

Emulation (Palladium/Veloce)

FPGA prototyping (HAPS/Protium)

Job description

Lumilens in San Jose, CA is seeking a Verification Lead to own end-to-end verification for a pioneering chiplet. As a founding hire, you’ll establish the methodology before RTL exists, shaping coverage strategy and regression infrastructure to accelerate tapeout.

You will drive hardware-assisted verification, emulation/FPGA prototyping, and UCIe/MCIe/VIP integrations while mentoring a growing DV team across multiple domains including MCU datapath and mixed-signal interfaces.