Impactful IC Verification Engineer (UVM/SoC)

Doist; San Jose (CA); On-site; USD 150,000 - 190,000; Full time

Benefits offered by this job

Competitive salary

Benefits package

Professional development support

Access to cutting-edge tech and cloud

Job summary

Lumilens is building a photonics-driven chiplet verification team in San Jose, CA. The IC Design Verification Engineer will develop UVM testbenches, write constrained-random tests, and drive functional coverage to closure across simulation, emulation, and hardware-assisted verification.

You’ll verify digital blocks against golden models, debug failures, and collaborate across design and DFT teams. The role emphasizes strong SystemVerilog/UVM skills, Python scripting, and experience with

Qualifications

• BS or MS in Electrical/Computer Engineering.
• 3+ years ASIC/SoC functional verification.
• Solid UVM/SystemVerilog; coverage-driven verification.
• Strong debug skills with Python, Perl, or TCL.
• Familiarity with regression/CI flows and failure triage.

Responsibilities

• Build and extend UVM testbenches for assigned blocks and subsystems.
• Write directed and constrained-random tests; develop functional coverage and drive it to closure.
• Verify the in-house engines against a golden model with programmable error injection.
• Integrate VIPs (UCIe) and run compliance, link-training, loopback, and lane-repair scenarios.
• Run regressions, triage failures, and maintain CI/regression flow.
• Register (UVM RAL) verification, firmware co-simulation, and boot flows on MCU subsystem.
• Mixed-signal co-simulation – verify digital blocks against analog/mixed-signal models.
• Support hardware-assisted verification – emulation/FPGA prototyping.
• Participate in gate-level and low-power (UPF) verification during signoff.
• Collaborate with design, architecture, modelling, and DFT teams.

Skills

UVM/SystemVerilog

Python scripting

Regression/CI

Debug skills

Gate-level verification

Education

BS or MS in Electrical/Computer Engineering

Tools

VIP/UCIe

Emulation/FPGA prototyping

Job description

Lumilens is building a photonics-driven chiplet verification team in San Jose, CA. The IC Design Verification Engineer will develop UVM testbenches, write constrained-random tests, and drive functional coverage to closure across simulation, emulation, and hardware-assisted verification.

You’ll verify digital blocks against golden models, debug failures, and collaborate across design and DFT teams. The role emphasizes strong SystemVerilog/UVM skills, Python scripting, and experience with