Lead Front-End Architect for High-Throughput Chiplets

Doist; San Jose (CA); On-site; USD 180,000 - 260,000; Full time

Benefits offered by this job

Competitive salary

Comprehensive benefits

Professional development support

Access to cutting-edge technology

Job summary

Lumilens in San Jose, CA is seeking a Lead RTL Front-End Architect to own the digital front-end design and the high-speed datapath that connects UCIe to the optical engine. You will define architecture, interfaces, and verification strategies as a founding hire, guiding the front-end team and collaborating across IP, DV, and backend groups.

You will shape the frontend methodology, timing-aware micro-architecture, and test infrastructure to enable multi-hundred-Gbps performance while ensuring

Qualifications

• 10+ years digital design/micro-architecture experience.
• Leadership ownership of a high-throughput datapath.
• Experience with UCIe/PCIe/CXL datapaths.
• Strong SystemVerilog RTL and timing awareness.
• Experience in front-end verification architecture.

Responsibilities

• Define front-end micro-architecture and partitioning.
• Own high-speed datapath and UCIe interface.
• Establish HDL coding standards, lint, CDC/RDC signoff.
• Lead and mentor the front-end design team.
• Collaborate with IP, DV, and backend teams for physical closure.

Skills

Front-end design

SystemVerilog RTL

High-speed datapath

UCIe/PCIe/CXL

Clocking Reset

CDC/RDC signoff

Education

Bachelor's degree in Electrical Engineering

Tools

EDA tools

Job description

Lumilens in San Jose, CA is seeking a Lead RTL Front-End Architect to own the digital front-end design and the high-speed datapath that connects UCIe to the optical engine. You will define architecture, interfaces, and verification strategies as a founding hire, guiding the front-end team and collaborating across IP, DV, and backend groups.

You will shape the frontend methodology, timing-aware micro-architecture, and test infrastructure to enable multi-hundred-Gbps performance while ensuring