Lead Physical Design Engineer – VR/AR Silicon

Meta; Sunnyvale (CA); Hybrid; USD 150,000 - 230,000; Full time

Job summary

Meta's Reality Labs in Silicon Valley seeks a Physical Design Engineer to translate RTL designs into optimized silicon implementations, spanning floorplanning, placement, clock tree synthesis, routing and signoff.

You will collaborate with architecture, design and verification teams to shape the physical implementation strategy for VR/AR chips that power next-generation wearables and spatial computing devices.

Responsibilities

• Lead physical implementation of complex blocks and subsystems from floorplanning through tapeout, including placement, clock tree synthesis, routing, and physical verification
• Define and drive physical design methodology, constraints, and flows to meet power, performance, and area targets for custom silicon in VR and AR products
• Perform static timing analysis and timing closure across multiple process corners and operating conditions
• Develop and optimize power delivery network strategies, including IR drop analysis and electromigration sign-off
• Collaborate with RTL designers and architects to provide physical design feedback that influences microarchitecture and floorplan decisions
• Partner with design verification and DFT teams to ensure physical implementation supports functional correctness and testability requirements
• Drive physical verification sign-off including DRC, LVS, and antenna checks in advanced process nodes

Job description

Meta's Reality Labs in Silicon Valley seeks a Physical Design Engineer to translate RTL designs into optimized silicon implementations, spanning floorplanning, placement, clock tree synthesis, routing and signoff.

You will collaborate with architecture, design and verification teams to shape the physical implementation strategy for VR/AR chips that power next-generation wearables and spatial computing devices.