Lead Modem PHY IP Verification Engineer

Blue Origin; San Francisco (CA); On-site; USD 269,175 - 376,843; Full time

Benefits offered by this job

Medical, dental, vision

401(k) with company match

Paid time off

Job summary

Blue Origin is seeking a Principal Modem PHY IP Design Verification Engineer to lead verification of advanced modem PHY IP for the Terawave program. You will design robust verification strategies, build scalable environments, and ensure high-quality IP delivery across simulation, emulation, prototyping, and silicon bring-up.

The ideal candidate has strong digital design verification experience, a background in modem PHY and DSP systems, and will collaborate with PHY architects, RTL, firmware,

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field.
• 10+ years in digital design verification, ASIC/SoC verification, or modem/baseband verification.
• Strong SystemVerilog and UVM experience.
• Experience developing verification environments for complex DSP, modem, or communications IP.

Responsibilities

• Develop and execute verification strategy and plans for modem PHY IP.
• Build block- and subsystem-level verification environments for PHY IP.
• Create testbenches, stimulus, checkers, scoreboards, assertions, and coverage models.
• Verify PHY IP functions: modulation/demodulation, timing, channel estimation, MIMO, FEC.
• Collaborate with RTL/architecture teams to correlate RTL with reference models.
• Define and track functional, code, assertion, and scenario coverage for verification completeness.
• Develop constrained-random and directed test strategies for feature and stress validation.
• Identify, debug, and root-cause design issues; support post-silicon validation.

Skills

SystemVerilog

UVM

Python

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science

Master's degree in Electrical Engineering or related field

Tools

MATLAB

C/C++

Python

Job description

Blue Origin is seeking a Principal Modem PHY IP Design Verification Engineer to lead verification of advanced modem PHY IP for the Terawave program. You will design robust verification strategies, build scalable environments, and ensure high-quality IP delivery across simulation, emulation, prototyping, and silicon bring-up.

The ideal candidate has strong digital design verification experience, a background in modem PHY and DSP systems, and will collaborate with PHY architects, RTL, firmware,