Lead Memory Circuit Design Engineer (DRAM)

Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. seeks a Principal Design Engineer to develop and optimize memory circuits from gate-level to full-chip implementations. You will lead schematic blocks such as arrays, control logic, and address decode while driving performance and area tradeoffs.

You will run advanced simulations with SPICE and Verilog, influence design rules, and collaborate across Product Engineering, Test, and Process teams to ensure on-time, high-quality silicon delivery.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field.
• Experience in semiconductor circuit design, layout, and optimization.
• Proficiency with circuit simulation and Verilog/SPICE.

Responsibilities

• Design and optimize memory circuits from gate-level to full chip implementations.
• Lead development of schematic blocks such as memory arrays, control logic, address decode, datapath, and internal test logic.
• Perform advanced circuit simulations using SPICE and VERILOG to validate performance.
• Drive architectural decisions related to power, speed, die area, and overall circuit performance.
• Collaborate with technology development and business units to define design rules, device requirements, and validation strategies.

Skills

Memory circuit design

Circuit optimization

SPICE simulations

Verilog

Cross-functional collaboration

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Experience in semiconductor circuit design

Tools

SPICE

Verilog

Job description

Micron Technology, Inc. seeks a Principal Design Engineer to develop and optimize memory circuits from gate-level to full-chip implementations. You will lead schematic blocks such as arrays, control logic, and address decode while driving performance and area tradeoffs.

You will run advanced simulations with SPICE and Verilog, influence design rules, and collaborate across Product Engineering, Test, and Process teams to ensure on-time, high-quality silicon delivery.