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AMD in San Jose seeks a Silicon Photonics Validation and Characterization Test Engineer to lead validation efforts across wafer-sort, die-level, and CPO-level testing, collaborating with silicon design, DFT, packaging, and product teams.
You will develop test solutions, train engineers, and drive production-ready fixtures and automation, tackling complex test challenges in high‑volume manufacturing of optical interconnect technologies.
AMD in San Jose seeks a Silicon Photonics Validation and Characterization Test Engineer to lead validation efforts across wafer-sort, die-level, and CPO-level testing, collaborating with silicon design, DFT, packaging, and product teams.
You will develop test solutions, train engineers, and drive production-ready fixtures and automation, tackling complex test challenges in high‑volume manufacturing of optical interconnect technologies.