Lead FPGA Digital Engineer for Space Systems

Northrop Grumman; Chandler (AZ); On-site; USD 140,000 - 190,000; Full time

Job summary

Northrop Grumman Space Systems in Chandler, AZ seeks a Staff FPGA Digital Engineer to join the Electro-Optics Group within Launch Vehicles. You will apply advanced FPGA engineering to deliver complex solutions across hardware, algorithms, and software teams.

The role requires leadership in design verification, test benches, and documentation, with a strong emphasis on timing, interface standards, and mentorship of junior staff in a fast-paced, collaborative environment.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline with extensive FPGA/SoC experience.
• Strong background in FPGA/SoC design and complex firmware development.
• Experience with timing, power, I/O constraints and static timing analysis.

Responsibilities

• Lead resolution of design and integration challenges across hardware, algorithms, and software.
• Develop and execute high-level test benches to verify FPGA designs for timing and functional correctness.
• Generate and integrate HDL modules, simulation results, and verification reports.
• Mentor junior engineers and ensure compliance with internal design standards.
• Prepare and maintain detailed design documentation including schematics and results.
• Stay current with FPGA technologies and tools to address technical issues.

Skills

FPGA/SoC design

VHDL

Verilog

OSVVM/UVM

Questa/ModelSim

Vivado/Vitis

Timing analysis

HDL coding

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Master’s degree

PhD (optional)

Tools

Questa/ModelSim

Vivado IDE

Vitis Unified IDE

Job description

Northrop Grumman Space Systems in Chandler, AZ seeks a Staff FPGA Digital Engineer to join the Electro-Optics Group within Launch Vehicles. You will apply advanced FPGA engineering to deliver complex solutions across hardware, algorithms, and software teams.

The role requires leadership in design verification, test benches, and documentation, with a strong emphasis on timing, interface standards, and mentorship of junior staff in a fast-paced, collaborative environment.