Lead DRAM Memory Design Architect

Micron Technology; Boise (ID); On-site; USD 75,000 - 105,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Paid time-off program

Job summary

Micron Technology is searching for a talented engineer in Boise, Idaho, to design and optimize memory circuits from gate-level to full chip implementations. The successful candidate will lead the development of schematic blocks and perform advanced circuit simulations.

Qualified applicants should have a Bachelor’s degree in Electrical Engineering or a related field and practical experience in semiconductor circuit design. Micron offers comprehensive benefits and a supportive work environment.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or equivalent experience.
• Experience in designing and optimizing semiconductor circuits.
• Proficiency with circuit simulation tools like SPICE and VERILOG.

Responsibilities

• Design and optimize memory circuits from gate-level to full chip.
• Lead development of schematic blocks like memory arrays and control logic.
• Perform advanced circuit simulations to validate performance.

Skills

Semiconductor circuit design

Circuit simulation

SPICE

VERILOG

Team leadership

Education

Bachelor’s degree in Electrical Engineering or related field

Master’s degree or PhD in Electrical Engineering

Tools

SPICE

VERILOG

Job description

Micron Technology is searching for a talented engineer in Boise, Idaho, to design and optimize memory circuits from gate-level to full chip implementations. The successful candidate will lead the development of schematic blocks and perform advanced circuit simulations.

Qualified applicants should have a Bachelor’s degree in Electrical Engineering or a related field and practical experience in semiconductor circuit design. Micron offers comprehensive benefits and a supportive work environment.