Lead ASIC Physical Design for Custom Datapaths & MACs

Google Inc.; Sunnyvale (CA); On-site; USD 192,000 - 279,000; Full time

Benefits offered by this job

Equity opportunities

Benefits including performance bonuses

Job summary

Google Inc. in Sunnyvale, CA, is looking for an experienced engineer to develop custom silicon solutions. You will shape AI/ML hardware and lead design from RTL to GDSII, optimizing for performance, power, and area.

Ideal candidates have extensive experience in physical design, particularly in sub-7nm processes, and possess strong scripting skills. This role offers a competitive salary and equity opportunities.

Qualifications

• 10 years of experience in physical design.
• Experience in sub-7nm process nodes.
• Expert-level scripting skills for layout automation.

Responsibilities

• Own custom datapath and matrix multiplication blocks.
• Analyze performance, power, and area tradeoffs.
• Lead sub-chip execution and mentor team.

Skills

Custom structured datapath implementation

Physical design and timing management

Scripting versatility (Tcl, Python, Perl)

Experience with EDA tools

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science

Master's degree or PhD in related fields

Tools

Synopsys Fusion Compiler

Cadence Innovus/Genus

PrimeTime

StarRC

Calibre

Apache Redhawk

Job description

Google Inc. in Sunnyvale, CA, is looking for an experienced engineer to develop custom silicon solutions. You will shape AI/ML hardware and lead design from RTL to GDSII, optimizing for performance, power, and area.

Ideal candidates have extensive experience in physical design, particularly in sub-7nm processes, and possess strong scripting skills. This role offers a competitive salary and equity opportunities.