Lead Analog IC Designer — High‑Speed SerDes & 7nm Focus

Cadence Design Systems; San Jose (CA); On-site; USD 115,000 - 213,000; Full time

Benefits offered by this job

Paid vacation

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plan

Job summary

Cadence Design Systems seeks an experienced Lead Analog IC Designer to drive the design and development of analog/mixed signal blocks from concept through verification. Candidates should have 3+ years in CMOS SerDes or high-speed I/O, with strong CAD tool proficiency and a track record in advanced node design.

The role offers a competitive salary in California, eligibility for incentive compensation, and comprehensive benefits.

Qualifications

• Minimum of 3 years in CMOS SerDes or high-speed I/O IC design.
• Working knowledge of SerDes standards and electrical requirements is a plus.
• Proficient in analog/mixed-signal circuit design and verification.

Responsibilities

• Design and development of analog/mixed signal IC blocks from concept to verification.
• Collaborate with cross-functional teams to meet customer specs.
• Utilize CAD tools for circuit simulation, layout, and physical verification.
• Contribute to advanced nodes (>112Gbps, <7nm) design efforts.

Skills

Analog IC design

SerDes

High-speed I/O

CMOS

Circuit blocks

Problem solving

Team collaboration

Education

MS in EE

PhD in EE

Tools

CAD tools

Cadence tools

Layout/verification

Job description

Cadence Design Systems seeks an experienced Lead Analog IC Designer to drive the design and development of analog/mixed signal blocks from concept through verification. Candidates should have 3+ years in CMOS SerDes or high-speed I/O, with strong CAD tool proficiency and a track record in advanced node design.

The role offers a competitive salary in California, eligibility for incentive compensation, and comprehensive benefits.